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authorNoam Camus <noamca@mellanox.com>2016-11-08 14:20:59 +0100
committerVineet Gupta <vgupta@synopsys.com>2016-11-08 18:39:37 +0100
commit19dbc76228899be555b84a09fd3a364c2ce86bbb (patch)
treecaecaa3516d542467cf236b7884252b40abe1ca0 /arch
parentARC: [plat-eznps] remove IPI clear from SMP operations (diff)
downloadlinux-19dbc76228899be555b84a09fd3a364c2ce86bbb.tar.xz
linux-19dbc76228899be555b84a09fd3a364c2ce86bbb.zip
ARC: [plat-eznps] set default baud for early console
For CONFIG_SERIAL_EARLYCON we need 800MHz for NPS SoC The early console driver uses BASE_BAUD and not using dtb. The default of 50MHz is NOT good for NPS SoC. Signed-off-by: Noam Camus <noamca@mellanox.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arc/kernel/devtree.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arc/kernel/devtree.c b/arch/arc/kernel/devtree.c
index f1e07c2344f8..3b67f538f142 100644
--- a/arch/arc/kernel/devtree.c
+++ b/arch/arc/kernel/devtree.c
@@ -31,6 +31,8 @@ static void __init arc_set_early_base_baud(unsigned long dt_root)
arc_base_baud = 166666666; /* Fixed 166.6MHz clk (TB10x) */
else if (of_flat_dt_is_compatible(dt_root, "snps,arc-sdp"))
arc_base_baud = 33333333; /* Fixed 33MHz clk (AXS10x) */
+ else if (of_flat_dt_is_compatible(dt_root, "ezchip,arc-nps"))
+ arc_base_baud = 800000000; /* Fixed 800MHz clk (NPS) */
else
arc_base_baud = 50000000; /* Fixed default 50MHz */
}