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authorMarek Szyprowski <m.szyprowski@samsung.com>2019-12-11 15:52:17 +0100
committerMaxime Ripard <maxime@cerno.tech>2019-12-17 09:37:14 +0100
commit1c226017d3ec93547b58082bdf778d9db7401c95 (patch)
tree05f3f43fd773facdc5982946f62678f412b22bbc /arch
parentarm64: dts: allwinner: a64: olinuxino: Fix SDIO supply regulator (diff)
downloadlinux-1c226017d3ec93547b58082bdf778d9db7401c95.tar.xz
linux-1c226017d3ec93547b58082bdf778d9db7401c95.zip
ARM: dts: sun8i: a83t: Correct USB3503 GPIOs polarity
Current USB3503 driver ignores GPIO polarity and always operates as if the GPIO lines were flagged as ACTIVE_HIGH. Fix the polarity for the existing USB3503 chip applications to match the chip specification and common convention for naming the pins. The only pin, which has to be ACTIVE_LOW is the reset pin. The remaining are ACTIVE_HIGH. This change allows later to fix the USB3503 driver to properly use generic GPIO bindings and read polarity from DT. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts b/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts
index fb928503ad45..d9be511f054f 100644
--- a/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts
@@ -101,7 +101,7 @@
initial-mode = <1>; /* initialize in HUB mode */
disabled-ports = <1>;
intn-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */
- reset-gpios = <&pio 4 16 GPIO_ACTIVE_HIGH>; /* PE16 */
+ reset-gpios = <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */
connect-gpios = <&pio 4 17 GPIO_ACTIVE_HIGH>; /* PE17 */
refclk-frequency = <19200000>;
};