diff options
| author | Will Deacon <will@kernel.org> | 2019-07-16 09:14:19 +0200 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2019-08-05 12:06:34 +0200 |
| commit | 332e5281a4e8269b96233a7babc98b03596b7e6d (patch) | |
| tree | ec5a3d83d58b8ac53540ce6fff75f08edf4ea9a9 /arch | |
| parent | arm64: Replace strncmp with str_has_prefix (diff) | |
| download | linux-332e5281a4e8269b96233a7babc98b03596b7e6d.tar.xz linux-332e5281a4e8269b96233a7babc98b03596b7e6d.zip | |
arm64: esr: Add ESR exception class encoding for trapped ERET
The ESR.EC encoding of 0b011010 (0x1a) describes an exception generated
by an ERET, ERETAA or ERETAB instruction as a result of a nested
virtualisation trap to EL2.
Add an encoding for this EC and a string description so that we identify
it correctly if we take one unexpectedly.
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm64/include/asm/esr.h | 3 | ||||
| -rw-r--r-- | arch/arm64/kernel/traps.c | 1 |
2 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h index 65ac18400979..cb29253ae86b 100644 --- a/arch/arm64/include/asm/esr.h +++ b/arch/arm64/include/asm/esr.h @@ -34,7 +34,8 @@ #define ESR_ELx_EC_SMC64 (0x17) /* EL2 and above */ #define ESR_ELx_EC_SYS64 (0x18) #define ESR_ELx_EC_SVE (0x19) -/* Unallocated EC: 0x1A - 0x1E */ +#define ESR_ELx_EC_ERET (0x1a) /* EL2 only */ +/* Unallocated EC: 0x1b - 0x1E */ #define ESR_ELx_EC_IMP_DEF (0x1f) /* EL3 only */ #define ESR_ELx_EC_IABT_LOW (0x20) #define ESR_ELx_EC_IABT_CUR (0x21) diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c index d3313797cca9..42c8422cdf4a 100644 --- a/arch/arm64/kernel/traps.c +++ b/arch/arm64/kernel/traps.c @@ -743,6 +743,7 @@ static const char *esr_class_str[] = { [ESR_ELx_EC_SMC64] = "SMC (AArch64)", [ESR_ELx_EC_SYS64] = "MSR/MRS (AArch64)", [ESR_ELx_EC_SVE] = "SVE", + [ESR_ELx_EC_ERET] = "ERET/ERETAA/ERETAB", [ESR_ELx_EC_IMP_DEF] = "EL3 IMP DEF", [ESR_ELx_EC_IABT_LOW] = "IABT (lower EL)", [ESR_ELx_EC_IABT_CUR] = "IABT (current EL)", |