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| author | Paul Burton <paul.burton@imgtec.com> | 2017-06-03 00:38:04 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2017-06-29 02:42:29 +0200 |
| commit | 5f930860e70a4761f026d3e3a9f7787eac3c4f60 (patch) | |
| tree | 86d9acf1f4960d7111fdcfaa6028ce03e0c5d89a /arch | |
| parent | MIPS: Allow storing pgd in C0_CONTEXT for MIPSr6 (diff) | |
| download | linux-5f930860e70a4761f026d3e3a9f7787eac3c4f60.tar.xz linux-5f930860e70a4761f026d3e3a9f7787eac3c4f60.zip | |
MIPS: Use current_cpu_type() in m4kc_tlbp_war()
Use current_cpu_type() to check for 4Kc processors instead of checking
the PRID directly. This will allow for the 4Kc case to be optimised out
of kernels that can't run on 4KC processors, thanks to __get_cpu_type()
and its unreachable() call.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16205/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/mm/tlbex.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index e6499209b81c..5aadc69c8ce3 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -153,8 +153,7 @@ static int scratchpad_offset(int i) */ static int m4kc_tlbp_war(void) { - return (current_cpu_data.processor_id & 0xffff00) == - (PRID_COMP_MIPS | PRID_IMP_4KC); + return current_cpu_type() == CPU_4KC; } /* Handle labels (which must be positive integers). */ |