summaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
authorArnd Bergmann <arnd@arndb.de>2022-05-06 22:12:37 +0200
committerArnd Bergmann <arnd@arndb.de>2022-05-06 22:12:38 +0200
commit620b2c35aba116dce389cb57725f9dd5b5b239b1 (patch)
treea277efcd9f4850a1fe969d723b5f2fdf221b0d38 /arch
parentMerge tag 'omap-for-v5.19/dt-part2-signed' of git://git.kernel.org/pub/scm/li... (diff)
parentarm64: dts: broadcom: drop useless 'dma-channels/requests' properties (diff)
downloadlinux-620b2c35aba116dce389cb57725f9dd5b5b239b1.tar.xz
linux-620b2c35aba116dce389cb57725f9dd5b5b239b1.zip
Merge tag 'dt64-cleanup-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Minor cleanup of ARM64 DTS for v5.19 Align SPI NOR node names and freq-table-hz to DT schema. Drop unused/undocumented dma-channels/dma-requests. * tag 'dt64-cleanup-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: broadcom: drop useless 'dma-channels/requests' properties arm64: dts: stratix10/agilex: drop useless 'dma-channels/requests' properties arm64: dts: marvell: align SPI NOR node name with dtschema arm64: dts: microchip: align SPI NOR node name with dtschema arm64: dts: hisilicon: align 'freq-table-hz' with dtschema in UFS Link: https://lore.kernel.org/r/20220506081438.149192-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi2
-rw-r--r--arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi2
-rw-r--r--arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi2
-rw-r--r--arch/arm64/boot/dts/hisilicon/hi3660.dtsi4
-rw-r--r--arch/arm64/boot/dts/hisilicon/hi3670.dtsi4
-rw-r--r--arch/arm64/boot/dts/intel/socfpga_agilex.dtsi2
-rw-r--r--arch/arm64/boot/dts/marvell/armada-3720-db.dts2
-rw-r--r--arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts2
-rw-r--r--arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts2
-rw-r--r--arch/arm64/boot/dts/marvell/armada-7040-db.dts4
-rw-r--r--arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts2
-rw-r--r--arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts2
-rw-r--r--arch/arm64/boot/dts/marvell/armada-8040-db.dts4
-rw-r--r--arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi2
-rw-r--r--arch/arm64/boot/dts/marvell/armada-8040-puzzle-m801.dts2
-rw-r--r--arch/arm64/boot/dts/marvell/cn9130-crb.dtsi2
-rw-r--r--arch/arm64/boot/dts/marvell/cn9130-db.dtsi2
-rw-r--r--arch/arm64/boot/dts/marvell/cn9131-db.dtsi2
-rw-r--r--arch/arm64/boot/dts/microchip/sparx5_nand.dtsi2
-rw-r--r--arch/arm64/boot/dts/microchip/sparx5_pcb125.dts4
-rw-r--r--arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi4
-rw-r--r--arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi4
22 files changed, 25 insertions, 33 deletions
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index 884bda106399..aa2bba75265f 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -346,8 +346,6 @@
<0 88 4>,
<0 89 4>;
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
clocks = <&clkmgr STRATIX10_L4_MAIN_CLK>;
clock-names = "apb_pclk";
resets = <&rst DMA_RESET>, <&rst DMA_OCP_RESET>;
diff --git a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
index f59fa3979a04..fda97c47f4e9 100644
--- a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
+++ b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
@@ -289,8 +289,6 @@
<GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
clocks = <&iprocslow>;
clock-names = "apb_pclk";
};
diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
index 7f1b8efd0883..09d4aa8ae1d6 100644
--- a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
+++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
@@ -556,8 +556,6 @@
<GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
clocks = <&hsls_div2_clk>;
clock-names = "apb_pclk";
iommus = <&smmu 0x6000 0x0000>;
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 8bd6d7e8a474..6b3057a09251 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -1045,8 +1045,8 @@
clocks = <&crg_ctrl HI3660_CLK_GATE_UFSIO_REF>,
<&crg_ctrl HI3660_CLK_GATE_UFSPHY_CFG>;
clock-names = "ref_clk", "phy_clk";
- freq-table-hz = <0 0
- 0 0>;
+ freq-table-hz = <0 0>,
+ <0 0>;
/* offset: 0x84; bit: 12 */
resets = <&crg_rst 0x84 12>;
reset-names = "rst";
diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
index 636c8817df7e..3125c3869c69 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
@@ -671,8 +671,8 @@
clocks = <&crg_ctrl HI3670_CLK_GATE_UFSIO_REF>,
<&crg_ctrl HI3670_CLK_GATE_UFS_SUBSYS>;
clock-names = "ref_clk", "phy_clk";
- freq-table-hz = <0 0
- 0 0>;
+ freq-table-hz = <0 0>,
+ <0 0>;
/* offset: 0x84; bit: 12 */
resets = <&crg_rst 0x84 12>;
reset-names = "rst";
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
index c78371703e76..caccb0334ada 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
@@ -350,8 +350,6 @@
<GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
resets = <&rst DMA_RESET>, <&rst DMA_OCP_RESET>;
reset-names = "dma", "dma-ocp";
clocks = <&clkmgr AGILEX_L4_MAIN_CLK>;
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-db.dts b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
index 3e5789f37206..bd4e61d5448e 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
@@ -164,7 +164,7 @@
pinctrl-names = "default";
pinctrl-0 = <&spi_quad_pins>;
- m25p80@0 {
+ flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <108000000>;
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
index 1cee26479bfe..d665f742a7d5 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
@@ -211,7 +211,7 @@
assigned-clock-parents = <&tbg 1>;
assigned-clock-rates = <20000000>;
- spi-flash@0 {
+ flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts b/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts
index 95d46e8d081c..a4de8d00cf46 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts
@@ -99,7 +99,7 @@
pinctrl-names = "default";
pinctrl-0 = <&spi_quad_pins>;
- m25p80@0 {
+ flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <54000000>;
diff --git a/arch/arm64/boot/dts/marvell/armada-7040-db.dts b/arch/arm64/boot/dts/marvell/armada-7040-db.dts
index cd326fe224ce..5e5baf6beea4 100644
--- a/arch/arm64/boot/dts/marvell/armada-7040-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-7040-db.dts
@@ -83,7 +83,7 @@
&spi0 {
status = "okay";
- spi-flash@0 {
+ flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
@@ -186,7 +186,7 @@
&cp0_spi1 {
status = "okay";
- spi-flash@0 {
+ flash@0 {
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-max-frequency = <20000000>;
diff --git a/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts b/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts
index f3b0d57a24a3..39a8e5e99d79 100644
--- a/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts
+++ b/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts
@@ -155,7 +155,7 @@
pinctrl-names = "default";
pinctrl-0 = <&cp0_spi1_pins>;
- spi-flash@0 {
+ flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
diff --git a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
index 8729c6467303..871f84b4a6ed 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
+++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
@@ -589,7 +589,7 @@
pinctrl-0 = <&cp1_spi1_pins>;
status = "okay";
- spi-flash@0 {
+ flash@0 {
compatible = "st,w25q32";
spi-max-frequency = <50000000>;
reg = <0>;
diff --git a/arch/arm64/boot/dts/marvell/armada-8040-db.dts b/arch/arm64/boot/dts/marvell/armada-8040-db.dts
index f2e8e0df8865..92897bd7e6cf 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-8040-db.dts
@@ -72,7 +72,7 @@
&spi0 {
status = "okay";
- spi-flash@0 {
+ flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
@@ -238,7 +238,7 @@
&cp1_spi1 {
status = "okay";
- spi-flash@0 {
+ flash@0 {
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-max-frequency = <20000000>;
diff --git a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi
index adbfecc678b5..779cf167c33e 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi
@@ -360,7 +360,7 @@
pinctrl-0 = <&cp1_spi1_pins>;
status = "okay";
- spi-flash@0 {
+ flash@0 {
compatible = "st,w25q32";
spi-max-frequency = <50000000>;
reg = <0>;
diff --git a/arch/arm64/boot/dts/marvell/armada-8040-puzzle-m801.dts b/arch/arm64/boot/dts/marvell/armada-8040-puzzle-m801.dts
index dac85fa748de..74bed79e4f5e 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-puzzle-m801.dts
+++ b/arch/arm64/boot/dts/marvell/armada-8040-puzzle-m801.dts
@@ -185,7 +185,7 @@
&spi0 {
status = "okay";
- spi-flash@0 {
+ flash@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "jedec,spi-nor";
diff --git a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
index d9f9f2c19740..1acd746284dc 100644
--- a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
+++ b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
@@ -175,7 +175,7 @@
<0x2000000 0x1000000>; /* CS0 */
status = "okay";
- spi-flash@0 {
+ flash@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "jedec,spi-nor";
diff --git a/arch/arm64/boot/dts/marvell/cn9130-db.dtsi b/arch/arm64/boot/dts/marvell/cn9130-db.dtsi
index c00b69b88bd2..7e20987253a3 100644
--- a/arch/arm64/boot/dts/marvell/cn9130-db.dtsi
+++ b/arch/arm64/boot/dts/marvell/cn9130-db.dtsi
@@ -310,7 +310,7 @@
pinctrl-0 = <&cp0_spi0_pins>;
reg = <0x700680 0x50>;
- spi-flash@0 {
+ flash@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "jedec,spi-nor";
diff --git a/arch/arm64/boot/dts/marvell/cn9131-db.dtsi b/arch/arm64/boot/dts/marvell/cn9131-db.dtsi
index f995b1bcda01..b7fc241a228c 100644
--- a/arch/arm64/boot/dts/marvell/cn9131-db.dtsi
+++ b/arch/arm64/boot/dts/marvell/cn9131-db.dtsi
@@ -137,7 +137,7 @@
pinctrl-0 = <&cp1_spi0_pins>;
reg = <0x700680 0x50>;
- spi-flash@0 {
+ flash@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "jedec,spi-nor";
diff --git a/arch/arm64/boot/dts/microchip/sparx5_nand.dtsi b/arch/arm64/boot/dts/microchip/sparx5_nand.dtsi
index 03f107e427d7..ce0747fd6444 100644
--- a/arch/arm64/boot/dts/microchip/sparx5_nand.dtsi
+++ b/arch/arm64/boot/dts/microchip/sparx5_nand.dtsi
@@ -19,7 +19,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <14>; /* CS14 */
- spi-flash@6 {
+ flash@6 {
compatible = "spi-nand";
pinctrl-0 = <&cs14_pins>;
pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb125.dts b/arch/arm64/boot/dts/microchip/sparx5_pcb125.dts
index 9baa085d7861..dbf8c1d48a02 100644
--- a/arch/arm64/boot/dts/microchip/sparx5_pcb125.dts
+++ b/arch/arm64/boot/dts/microchip/sparx5_pcb125.dts
@@ -47,7 +47,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0>; /* CS0 */
- spi-flash@9 {
+ flash@9 {
compatible = "jedec,spi-nor";
spi-max-frequency = <8000000>;
reg = <0x9>; /* SPI */
@@ -59,7 +59,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <1>; /* CS1 */
- spi-flash@9 {
+ flash@9 {
compatible = "spi-nand";
pinctrl-0 = <&cs1_pins>;
pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi b/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi
index 33faf1f3264f..699256f1b9d8 100644
--- a/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi
+++ b/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi
@@ -274,7 +274,7 @@
&spi0 {
status = "okay";
- spi-flash@0 {
+ flash@0 {
compatible = "jedec,spi-nor";
spi-max-frequency = <8000000>;
reg = <0>;
@@ -289,7 +289,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0>; /* CS0 */
- spi-flash@9 {
+ flash@9 {
compatible = "jedec,spi-nor";
spi-max-frequency = <8000000>;
reg = <0x9>; /* SPI */
diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi b/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi
index ef96e6d8c6b3..d10a9172b529 100644
--- a/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi
+++ b/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi
@@ -89,7 +89,7 @@
&spi0 {
status = "okay";
- spi-flash@0 {
+ flash@0 {
compatible = "jedec,spi-nor";
spi-max-frequency = <8000000>;
reg = <0>;
@@ -104,7 +104,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0>; /* CS0 */
- spi-flash@9 {
+ flash@9 {
compatible = "jedec,spi-nor";
spi-max-frequency = <8000000>;
reg = <0x9>; /* SPI */
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-02 21:23:43 +0100