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authorMaciej W. Rozycki <macro@imgtec.com>2017-06-16 01:06:19 +0200
committerRalf Baechle <ralf@linux-mips.org>2017-06-29 02:42:26 +0200
commita9db101b735a9d49295326ae41f610f6da62b08c (patch)
tree6aa5c53e12c5b7a346bc99f51288f6bbfec0714d /arch
parentMIPS: math-emu: Prevent wrong ISA mode instruction emulation (diff)
downloadlinux-a9db101b735a9d49295326ae41f610f6da62b08c.tar.xz
linux-a9db101b735a9d49295326ae41f610f6da62b08c.zip
MIPS: Actually decode JALX in `__compute_return_epc_for_insn'
Complement commit fb6883e5809c ("MIPS: microMIPS: Support handling of delay slots.") and actually decode the regular MIPS JALX major instruction opcode, the handling of which has been added with the said commit for EPC calculation in `__compute_return_epc_for_insn'. Fixes: fb6883e5809c ("MIPS: microMIPS: Support handling of delay slots.") Signed-off-by: Maciej W. Rozycki <macro@imgtec.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Cc: stable@vger.kernel.org # 3.9+ Patchwork: https://patchwork.linux-mips.org/patch/16394/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/kernel/branch.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c
index f702a459a830..40cc3def36a4 100644
--- a/arch/mips/kernel/branch.c
+++ b/arch/mips/kernel/branch.c
@@ -556,6 +556,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
/*
* These are unconditional and in j_format.
*/
+ case jalx_op:
case jal_op:
regs->regs[31] = regs->cp0_epc + 8;
case j_op: