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| author | Konrad Dybcio <konrad.dybcio@somainline.org> | 2022-04-15 13:56:13 +0200 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2022-04-20 01:22:15 +0200 |
| commit | b905c34ae7db6b564589f02fa7eac7afaa0294e9 (patch) | |
| tree | 7d6e7b88212b6e1b1f79182a03091c80843c558b /arch | |
| parent | ARM: dts: qcom-msm8974: Remove properties that are always overriden (diff) | |
| download | linux-b905c34ae7db6b564589f02fa7eac7afaa0294e9.tar.xz linux-b905c34ae7db6b564589f02fa7eac7afaa0294e9.zip | |
ARM: dts: qcom-msm8974*: Fix UART naming
It's either uart10, or blsp2_uart4, not blsp2_uart10, as there aren't 10
UARTs on BLSP2. Fix the naming to align with what's done in arm64/qcom.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220415115633.575010-4-konrad.dybcio@somainline.org
Diffstat (limited to 'arch')
4 files changed, 12 insertions, 12 deletions
diff --git a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts index 5fbdba73c07f..dd2d0647d4be 100644 --- a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts +++ b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts @@ -12,7 +12,7 @@ aliases { serial0 = &blsp1_uart1; - serial1 = &blsp2_uart10; + serial1 = &blsp2_uart4; }; chosen { @@ -395,7 +395,7 @@ }; }; - blsp2_uart10_pin_a: blsp2-uart10-pin-active { + blsp2_uart4_pin_a: blsp2-uart4-pin-active { tx { pins = "gpio53"; function = "blsp_uart10"; @@ -473,7 +473,7 @@ status = "okay"; pinctrl-names = "default"; - pinctrl-0 = <&blsp2_uart10_pin_a>; + pinctrl-0 = <&blsp2_uart4_pin_a>; bluetooth { compatible = "brcm,bcm43438-bt"; diff --git a/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts b/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts index 1f630120c01f..95ae30d06554 100644 --- a/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts +++ b/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts @@ -358,13 +358,13 @@ status = "okay"; }; - /* blsp2_uart8 */ + /* blsp2_uart2 */ serial@f995e000 { status = "okay"; pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp2_uart8_pins_active>; - pinctrl-1 = <&blsp2_uart8_pins_sleep>; + pinctrl-0 = <&blsp2_uart2_pins_active>; + pinctrl-1 = <&blsp2_uart2_pins_sleep>; bluetooth { compatible = "brcm,bcm43540-bt"; @@ -380,14 +380,14 @@ }; pinctrl@fd510000 { - blsp2_uart8_pins_active: blsp2-uart8-pins-active { + blsp2_uart2_pins_active: blsp2-uart2-pins-active { pins = "gpio45", "gpio46", "gpio47", "gpio48"; function = "blsp_uart8"; drive-strength = <8>; bias-disable; }; - blsp2_uart8_pins_sleep: blsp2-uart8-pins-sleep { + blsp2_uart2_pins_sleep: blsp2-uart2-pins-sleep { pins = "gpio45", "gpio46", "gpio47", "gpio48"; function = "gpio"; drive-strength = <2>; diff --git a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-shinano-castor.dts b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-shinano-castor.dts index 3c4a7d760ba9..e27b360951fd 100644 --- a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-shinano-castor.dts +++ b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-shinano-castor.dts @@ -11,7 +11,7 @@ aliases { serial0 = &blsp1_uart2; - serial1 = &blsp2_uart7; + serial1 = &blsp2_uart1; }; chosen { diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 4c773b63e59a..ccd2593dc8c4 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -713,7 +713,7 @@ status = "disabled"; }; - blsp2_uart7: serial@f995d000 { + blsp2_uart1: serial@f995d000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0xf995d000 0x1000>; interrupts = <GIC_SPI 113 IRQ_TYPE_NONE>; @@ -722,7 +722,7 @@ status = "disabled"; }; - blsp2_uart8: serial@f995e000 { + blsp2_uart2: serial@f995e000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0xf995e000 0x1000>; interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; @@ -731,7 +731,7 @@ status = "disabled"; }; - blsp2_uart10: serial@f9960000 { + blsp2_uart4: serial@f9960000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0xf9960000 0x1000>; interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; |