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| author | Florian Fainelli <f.fainelli@gmail.com> | 2019-10-31 22:47:24 +0100 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2019-11-01 11:47:37 +0100 |
| commit | e059770cb1cdfbcbe3f1748f76005861cc79dd1a (patch) | |
| tree | 9a09a2bd605910494197874d2a8503101fc0327f /arch | |
| parent | arm64: apply ARM64_ERRATUM_845719 workaround for Brahma-B53 core (diff) | |
| download | linux-e059770cb1cdfbcbe3f1748f76005861cc79dd1a.tar.xz linux-e059770cb1cdfbcbe3f1748f76005861cc79dd1a.zip | |
arm64: Brahma-B53 is SSB and spectre v2 safe
Add the Brahma-B53 CPU (all versions) to the whitelists of CPUs for the
SSB and spectre v2 mitigations.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm64/kernel/cpu_errata.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index b5eeba7f5d84..a1983c0a872b 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -489,6 +489,7 @@ static const struct midr_range arm64_ssb_cpus[] = { MIDR_ALL_VERSIONS(MIDR_CORTEX_A35), MIDR_ALL_VERSIONS(MIDR_CORTEX_A53), MIDR_ALL_VERSIONS(MIDR_CORTEX_A55), + MIDR_ALL_VERSIONS(MIDR_BRAHMA_B53), {}, }; @@ -573,6 +574,7 @@ static const struct midr_range spectre_v2_safe_list[] = { MIDR_ALL_VERSIONS(MIDR_CORTEX_A35), MIDR_ALL_VERSIONS(MIDR_CORTEX_A53), MIDR_ALL_VERSIONS(MIDR_CORTEX_A55), + MIDR_ALL_VERSIONS(MIDR_BRAHMA_B53), { /* sentinel */ } }; |