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author | Herbert Xu <herbert@gondor.apana.org.au> | 2022-04-26 11:42:36 +0200 |
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committer | Herbert Xu <herbert@gondor.apana.org.au> | 2022-04-26 11:42:36 +0200 |
commit | c6d3ffae0d3229e06097f2790f459c96fca5e367 (patch) | |
tree | 2d22304f685b403bf4c96fd958413f4d322cc94e /drivers/char | |
parent | crypto: hisilicon/qm - remove hisi_qm_get_free_qp_num() (diff) | |
download | linux-c6d3ffae0d3229e06097f2790f459c96fca5e367.tar.xz linux-c6d3ffae0d3229e06097f2790f459c96fca5e367.zip |
Revert "hwrng: mpfs - Enable COMPILE_TEST"
This reverts commit 6a71277ce91e4766ebe9a5f6725089c80d043ba2.
The underlying option POLARFIRE_SOC_SYS_CTRL already supports
COMPILE_TEST so there is no need for this. What's more, if
we force this option on without the underlying option it fails
to build.
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/char')
-rw-r--r-- | drivers/char/hw_random/Kconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig index 1245472a0dfe..c3a9f17bf31c 100644 --- a/drivers/char/hw_random/Kconfig +++ b/drivers/char/hw_random/Kconfig @@ -387,7 +387,7 @@ config HW_RANDOM_PIC32 config HW_RANDOM_POLARFIRE_SOC tristate "Microchip PolarFire SoC Random Number Generator support" - depends on POLARFIRE_SOC_SYS_CTRL || COMPILE_TEST + depends on HW_RANDOM && POLARFIRE_SOC_SYS_CTRL help This driver provides kernel-side support for the Random Number Generator hardware found on PolarFire SoC (MPFS). |