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authorJacky Bai <ping.bai@nxp.com>2021-09-14 08:52:04 +0200
committerAbel Vesa <abel.vesa@nxp.com>2021-09-30 15:22:55 +0200
commit75c6f1a0191a8d0c5c8e9cc5d33daa47d88783e1 (patch)
tree497ac2b6f6a16e5f240d811a69ff0527b01e5ad7 /drivers/clk/imx/clk-composite-7ulp.c
parentclk: imx: disable i.mx7ulp composite clock during initialization (diff)
downloadlinux-75c6f1a0191a8d0c5c8e9cc5d33daa47d88783e1.tar.xz
linux-75c6f1a0191a8d0c5c8e9cc5d33daa47d88783e1.zip
clk: imx: Add 'CLK_SET_RATE_NO_REPARENT' for composite-7ulp
For the imx_composite-7ulp clock type, The clock parent should be changed explicitly by end user of this clock, if the the 'CLK_SET_RATE_NO_REPARENT' flag is not set, when user want to set a clock frequency that can NOT get from HW accurately, then the clock's parent will be switch to another clock parent sometimes. This is NOT what we expected and introduced some additional debug effort, so add the 'CLK_SET_RATE_NO_REPARENT' to avoid such unexpected result. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Link: https://lore.kernel.org/r/20210914065208.3582128-6-ping.bai@nxp.com Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Diffstat (limited to 'drivers/clk/imx/clk-composite-7ulp.c')
-rw-r--r--drivers/clk/imx/clk-composite-7ulp.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/imx/clk-composite-7ulp.c b/drivers/clk/imx/clk-composite-7ulp.c
index 92908ee4509d..9ce8c630ee32 100644
--- a/drivers/clk/imx/clk-composite-7ulp.c
+++ b/drivers/clk/imx/clk-composite-7ulp.c
@@ -131,7 +131,7 @@ static struct clk_hw *imx_ulp_clk_hw_composite(const char *name,
mux_hw, &clk_mux_ops, fd_hw,
&clk_fractional_divider_ops, gate_hw,
has_swrst ? &pcc_gate_ops : &clk_gate_ops, CLK_SET_RATE_GATE |
- CLK_SET_PARENT_GATE);
+ CLK_SET_PARENT_GATE | CLK_SET_RATE_NO_REPARENT);
if (IS_ERR(hw)) {
kfree(mux);
kfree(fd);