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| author | AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2023-03-06 15:04:55 +0100 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2023-03-13 19:50:13 +0100 |
| commit | f8c3e0e3f31b36ed6b96e437b00fe853cd46a977 (patch) | |
| tree | e230ca53098f4a69be20aaa75f8f6fd569ee9804 /drivers/clk/mediatek/clk-mt8365-apu.c | |
| parent | clk: mediatek: mt2712: Migrate topckgen/mcucfg to mtk_clk_simple_probe() (diff) | |
| download | linux-f8c3e0e3f31b36ed6b96e437b00fe853cd46a977.tar.xz linux-f8c3e0e3f31b36ed6b96e437b00fe853cd46a977.zip | |
clk: mediatek: mt2712: Compress clock arrays entries to 90 columns
Compress the clock arrays entries to allow a maximum of 90 columns:
this greatly increases readability and also generously reduces the
amount of lines.
While at it, also fix some indentation here and there.
This is a cosmetic change. No functional changes.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20230306140543.1813621-7-angelogioacchino.delregno@collabora.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/mediatek/clk-mt8365-apu.c')
0 files changed, 0 insertions, 0 deletions