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authorChun-Jie Chen <chun-jie.chen@mediatek.com>2021-07-26 12:57:06 +0200
committerStephen Boyd <sboyd@kernel.org>2021-07-27 19:53:07 +0200
commitc58cd0e40ffac67961b945793876b973728f9b80 (patch)
treed0fd77ee562ffcf8febeb85c490f48b458853eb3 /drivers/clk/mediatek/clk-mtk.h
parentclk: mediatek: Add configurable enable control to mtk_pll_data (diff)
downloadlinux-c58cd0e40ffac67961b945793876b973728f9b80.tar.xz
linux-c58cd0e40ffac67961b945793876b973728f9b80.zip
clk: mediatek: Add mtk_clk_simple_probe() to simplify clock providers
Most of subsystem clock providers only need to register clock gates in their probe() function. To reduce the duplicated code by add a generic function. Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Link: https://lore.kernel.org/r/20210726105719.15793-9-chun-jie.chen@mediatek.com Reviewed-by: Ikjoon Jang <ikjn@chromium.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/mediatek/clk-mtk.h')
-rw-r--r--drivers/clk/mediatek/clk-mtk.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h
index 31c7cb304508..7de41c3b3206 100644
--- a/drivers/clk/mediatek/clk-mtk.h
+++ b/drivers/clk/mediatek/clk-mtk.h
@@ -10,6 +10,7 @@
#include <linux/regmap.h>
#include <linux/bitops.h>
#include <linux/clk-provider.h>
+#include <linux/platform_device.h>
struct clk;
struct clk_onecell_data;
@@ -250,4 +251,11 @@ void mtk_register_reset_controller(struct device_node *np,
void mtk_register_reset_controller_set_clr(struct device_node *np,
unsigned int num_regs, int regofs);
+struct mtk_clk_desc {
+ const struct mtk_gate *clks;
+ size_t num_clks;
+};
+
+int mtk_clk_simple_probe(struct platform_device *pdev);
+
#endif /* __DRV_CLK_MTK_H */