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authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>2020-12-26 13:15:55 +0100
committerJerome Brunet <jbrunet@baylibre.com>2021-01-04 11:42:38 +0100
commit9e717285f0bd591d716fa0e7418f2cdaf756dd25 (patch)
treef0d60be441498594158dc639b2d510551ede6fc5 /drivers/clk/meson
parentclk: meson: clk-pll: fix initializing the old rate (fallback) for a PLL (diff)
downloadlinux-9e717285f0bd591d716fa0e7418f2cdaf756dd25.tar.xz
linux-9e717285f0bd591d716fa0e7418f2cdaf756dd25.zip
clk: meson: clk-pll: make "ret" a signed integer
The error codes returned by meson_clk_get_pll_settings() are all negative. Make "ret" a signed integer in meson_clk_pll_set_rate() to make it match with the clk_ops.set_rate API as well as the data type returned by meson_clk_get_pll_settings(). Fixes: 8eed1db1adec6a ("clk: meson: pll: update driver for the g12a") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20201226121556.975418-3-martin.blumenstingl@googlemail.com
Diffstat (limited to 'drivers/clk/meson')
-rw-r--r--drivers/clk/meson/clk-pll.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/clk/meson/clk-pll.c b/drivers/clk/meson/clk-pll.c
index 9404609b5ebf..5b932976483f 100644
--- a/drivers/clk/meson/clk-pll.c
+++ b/drivers/clk/meson/clk-pll.c
@@ -365,8 +365,9 @@ static int meson_clk_pll_set_rate(struct clk_hw *hw, unsigned long rate,
{
struct clk_regmap *clk = to_clk_regmap(hw);
struct meson_clk_pll_data *pll = meson_clk_pll_data(clk);
- unsigned int enabled, m, n, frac = 0, ret;
+ unsigned int enabled, m, n, frac = 0;
unsigned long old_rate;
+ int ret;
if (parent_rate == 0 || rate == 0)
return -EINVAL;