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authorStephen Boyd <sboyd@codeaurora.org>2014-01-15 19:47:24 +0100
committerMike Turquette <mturquette@linaro.org>2014-01-16 21:00:59 +0100
commit9e2631313c463c11645db046beb9bdecaf28b62f (patch)
treee5af54c695abf7a218b7af55c5fcc40bcf9076e3 /drivers/clk/qcom/Makefile
parentclk: qcom: Add a regmap type clock struct (diff)
downloadlinux-9e2631313c463c11645db046beb9bdecaf28b62f.tar.xz
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clk: qcom: Add support for phase locked loops (PLLs)
Add support for Qualcomm's PLLs (phase locked loops). This is sufficient enough to be able to determine the rate the PLL is running at. We can add rate setting support later when it's needed. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/qcom/Makefile')
-rw-r--r--drivers/clk/qcom/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile
index f9faa8fa9392..7871e235c2b1 100644
--- a/drivers/clk/qcom/Makefile
+++ b/drivers/clk/qcom/Makefile
@@ -1,3 +1,4 @@
obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o
clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += clk-regmap.o
+clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += clk-pll.o