summaryrefslogtreecommitdiffstats
path: root/drivers/clk/qcom/gcc-apq8084.c
diff options
context:
space:
mode:
authorStephen Boyd <sboyd@codeaurora.org>2015-10-27 02:10:09 +0100
committerStephen Boyd <sboyd@codeaurora.org>2015-11-16 20:07:06 +0100
commita085f877a882b465fce74188c9d8efd12bd5acd4 (patch)
tree2183cbd18147e908fcdcfdf800f663d532f49878 /drivers/clk/qcom/gcc-apq8084.c
parentclk: qcom: common: Add API to register board clocks backwards compatibly (diff)
downloadlinux-a085f877a882b465fce74188c9d8efd12bd5acd4.tar.xz
linux-a085f877a882b465fce74188c9d8efd12bd5acd4.zip
clk: qcom: Move cxo/pxo/xo into dt files
Put these clocks into the dt files instead of registering them from C code. This provides a few benefits. It allows us to specify the frequency of these clocks at the board level instead of hard-coding them in the driver. It allows us to insert an RPM clock in between the consumers of the crystals and the actual clock. And finally, it helps us transition the GCC driver to use RPM clocks when that configuration is enabled. Cc: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/qcom/gcc-apq8084.c')
-rw-r--r--drivers/clk/qcom/gcc-apq8084.c16
1 files changed, 7 insertions, 9 deletions
diff --git a/drivers/clk/qcom/gcc-apq8084.c b/drivers/clk/qcom/gcc-apq8084.c
index 1567c3a79534..070037a29ea5 100644
--- a/drivers/clk/qcom/gcc-apq8084.c
+++ b/drivers/clk/qcom/gcc-apq8084.c
@@ -3607,18 +3607,16 @@ MODULE_DEVICE_TABLE(of, gcc_apq8084_match_table);
static int gcc_apq8084_probe(struct platform_device *pdev)
{
- struct clk *clk;
+ int ret;
struct device *dev = &pdev->dev;
- /* Temporary until RPM clocks supported */
- clk = clk_register_fixed_rate(dev, "xo", NULL, CLK_IS_ROOT, 19200000);
- if (IS_ERR(clk))
- return PTR_ERR(clk);
+ ret = qcom_cc_register_board_clk(dev, "xo_board", "xo", 19200000);
+ if (ret)
+ return ret;
- clk = clk_register_fixed_rate(dev, "sleep_clk_src", NULL,
- CLK_IS_ROOT, 32768);
- if (IS_ERR(clk))
- return PTR_ERR(clk);
+ ret = qcom_cc_register_sleep_clk(dev);
+ if (ret)
+ return ret;
return qcom_cc_probe(pdev, &gcc_apq8084_desc);
}