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authorStephen Boyd <sboyd@kernel.org>2019-03-08 19:34:22 +0100
committerStephen Boyd <sboyd@kernel.org>2019-03-08 19:34:22 +0100
commitfea0b0850aad878391b1021b3b1b4044c4ec5aaf (patch)
treecdb3f53dc014fb8e0c4346e905751bfb77c32bd2 /drivers/clk/samsung
parentMerge branch 'clk-at91' into clk-next (diff)
parentclk: samsung: fix typo (diff)
parentdt-bindings: clock: Convert fixed-factor-clock to json-schema (diff)
parentclk: mediatek: update clock driver of MT2712 (diff)
parentMerge tag 'v5.1-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/g... (diff)
downloadlinux-fea0b0850aad878391b1021b3b1b4044c4ec5aaf.tar.xz
linux-fea0b0850aad878391b1021b3b1b4044c4ec5aaf.zip
Merge branches 'clk-typo', 'clk-json-schema', 'clk-mtk-2712-eco' and 'clk-rockchip' into clk-next
- Convert a few clk bindings to JSON schema format - 3rd ECO fix for Mediatek MT2712 SoCs * clk-typo: clk: samsung: fix typo * clk-json-schema: dt-bindings: clock: Convert fixed-factor-clock to json-schema dt-bindings: clock: Convert fixed-clock binding to json-schema * clk-mtk-2712-eco: clk: mediatek: update clock driver of MT2712 dt-bindings: clock: add clock for MT2712 * clk-rockchip: clk: rockchip: add CLK_SET_RATE_PARENT for rk3066 lcdc dclks clk: rockchip: fix frac settings of GPLL clock for rk3328