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| author | Paul Cercueil <paul@crapouillou.net> | 2021-05-30 18:49:21 +0200 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2021-06-28 04:49:17 +0200 |
| commit | 037f1ffd0f0a6bad89e17aa4698c97ef430c6ad1 (patch) | |
| tree | a9bfcfae8cfa961c5caba6119ec444bd857be429 /drivers/clk/sunxi | |
| parent | clk: ingenic: Read bypass register only when there is one (diff) | |
| download | linux-037f1ffd0f0a6bad89e17aa4698c97ef430c6ad1.tar.xz linux-037f1ffd0f0a6bad89e17aa4698c97ef430c6ad1.zip | |
clk: ingenic: Remove pll_info.no_bypass_bit
We can express that a PLL has no bypass bit by simply setting the
.bypass_bit field to a negative value.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/20210530164923.18134-5-paul@crapouillou.net
Tested-by: 周琰杰 (Zhou Yanjie)<zhouyanjie@wanyeetech.com> # on CU1830-neo/X1830
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/sunxi')
0 files changed, 0 insertions, 0 deletions