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authorPeter De Schrijver <pdeschrijver@nvidia.com>2017-07-25 12:34:10 +0200
committerStephen Boyd <sboyd@codeaurora.org>2017-08-24 00:59:50 +0200
commit1934ffd08d79ad746dbb1e2fcaeb76950be57be6 (patch)
tree7375320d73644d156b623c58bc8231d4298ab01a /drivers/clk/tegra/clk-tegra210.c
parentclk: tegra: change post IDDQ release delay to 5us (diff)
downloadlinux-1934ffd08d79ad746dbb1e2fcaeb76950be57be6.tar.xz
linux-1934ffd08d79ad746dbb1e2fcaeb76950be57be6.zip
clk: tegra: don't warn for pll_d2 defaults unnecessarily
If the PLL is on, only warn if the defaults are not yet set. Otherwise be silent. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Reviewed-by: Timo Alho <talho@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/tegra/clk-tegra210.c')
-rw-r--r--drivers/clk/tegra/clk-tegra210.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c
index a4d7d94b6436..1e470ca154f6 100644
--- a/drivers/clk/tegra/clk-tegra210.c
+++ b/drivers/clk/tegra/clk-tegra210.c
@@ -718,8 +718,6 @@ static void plldss_defaults(const char *pll_name, struct tegra_clk_pll *plldss,
plldss->params->defaults_set = true;
if (val & PLL_ENABLE) {
- pr_warn("%s already enabled. Postponing set full defaults\n",
- pll_name);
/*
* PLL is ON: check if defaults already set, then set those
@@ -758,6 +756,10 @@ static void plldss_defaults(const char *pll_name, struct tegra_clk_pll *plldss,
(~PLLDSS_MISC1_CFG_EN_SDM));
}
+ if (!plldss->params->defaults_set)
+ pr_warn("%s already enabled. Postponing set full defaults\n",
+ pll_name);
+
/* Enable lock detect */
if (val & PLLDSS_BASE_LOCK_OVERRIDE) {
val &= ~PLLDSS_BASE_LOCK_OVERRIDE;