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authorStephen Boyd <sboyd@codeaurora.org>2017-08-03 03:38:01 +0200
committerStephen Boyd <sboyd@codeaurora.org>2017-08-03 03:38:01 +0200
commit8e7be401f2f57673d71a9adf7dd8a9b58ae4e955 (patch)
tree5772b116f3198d203d648437336a9c5ad1072412 /drivers/clk/uniphier/clk-uniphier-core.c
parentclk: Convert to using %pOF instead of full_name (diff)
parentclk: keystone: sci-clk: Fix sci_clk_get (diff)
downloadlinux-8e7be401f2f57673d71a9adf7dd8a9b58ae4e955.tar.xz
linux-8e7be401f2f57673d71a9adf7dd8a9b58ae4e955.zip
Merge branch 'clk-fixes' into clk-next
* clk-fixes: clk: keystone: sci-clk: Fix sci_clk_get clk: meson: mpll: fix mpll0 fractional part ignored clk: samsung: exynos5420: The EPLL rate table corrections clk: sunxi-ng: sun5i: Add clk_set_rate_parent to the CPU clock
Diffstat (limited to 'drivers/clk/uniphier/clk-uniphier-core.c')
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