diff options
| author | Taniya Das <quic_tdas@quicinc.com> | 2024-06-21 14:04:23 +0200 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2024-06-23 22:52:56 +0200 |
| commit | 313e2909023bef36ef7b6d1d9ff2d98febcaa28d (patch) | |
| tree | 8ec347e9458de15959ae3b474040bcfb50cbe4f0 /drivers/clk | |
| parent | clk: qcom: nsscc-qca8k: Fix the MDIO functions undefined issue (diff) | |
| download | linux-313e2909023bef36ef7b6d1d9ff2d98febcaa28d.tar.xz linux-313e2909023bef36ef7b6d1d9ff2d98febcaa28d.zip | |
clk: qcom: gpucc-sm8350: Park RCG's clk source at XO during disable
The RCG's clk src has to be parked at XO while disabling as per the
HW recommendation, hence use clk_rcg2_shared_ops to achieve the same.
Fixes: 160758b05ab1 ("clk: qcom: add support for SM8350 GPUCC")
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # SM8350-HDK
Link: https://lore.kernel.org/r/20240621-sm8350-gpucc-fixes-v1-1-22db60c7c5d3@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/qcom/gpucc-sm8350.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/clk/qcom/gpucc-sm8350.c b/drivers/clk/qcom/gpucc-sm8350.c index f6bb8244dd40..f3b6bdc24485 100644 --- a/drivers/clk/qcom/gpucc-sm8350.c +++ b/drivers/clk/qcom/gpucc-sm8350.c @@ -2,6 +2,7 @@ /* * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. * Copyright (c) 2022, Linaro Limited + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. */ #include <linux/clk.h> @@ -147,7 +148,7 @@ static struct clk_rcg2 gpu_cc_gmu_clk_src = { .parent_data = gpu_cc_parent_data_0, .num_parents = ARRAY_SIZE(gpu_cc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, + .ops = &clk_rcg2_shared_ops, }, }; @@ -169,7 +170,7 @@ static struct clk_rcg2 gpu_cc_hub_clk_src = { .parent_data = gpu_cc_parent_data_1, .num_parents = ARRAY_SIZE(gpu_cc_parent_data_1), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, + .ops = &clk_rcg2_shared_ops, }, }; |