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author | Hao Fang <fanghao11@huawei.com> | 2020-04-02 08:53:03 +0200 |
---|---|---|
committer | Herbert Xu <herbert@gondor.apana.org.au> | 2020-04-16 08:49:21 +0200 |
commit | 35ee280fb1fb97ffa32a19953457becb4f45579b (patch) | |
tree | bf33ed6ed22affb252efd72d2afa240a611932da /drivers/crypto/hisilicon/hpre/hpre_main.c | |
parent | crypto: hisilicon - unify SR-IOV related codes into QM (diff) | |
download | linux-35ee280fb1fb97ffa32a19953457becb4f45579b.tar.xz linux-35ee280fb1fb97ffa32a19953457becb4f45579b.zip |
crypto: hisilicon - add vfs_num module parameter for hpre/sec
The vfs_num module parameter has been used in zip driver, this patch adds
this for HPRE and SEC driver.
Signed-off-by: Hao Fang <fanghao11@huawei.com>
Signed-off-by: Shukun Tan <tanshukun1@huawei.com>
Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com>
Reviewed-by: Zaibo Xu <xuzaibo@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/hisilicon/hpre/hpre_main.c')
-rw-r--r-- | drivers/crypto/hisilicon/hpre/hpre_main.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/drivers/crypto/hisilicon/hpre/hpre_main.c b/drivers/crypto/hisilicon/hpre/hpre_main.c index 4e41d308f0a9..9cff5c1b7c9b 100644 --- a/drivers/crypto/hisilicon/hpre/hpre_main.c +++ b/drivers/crypto/hisilicon/hpre/hpre_main.c @@ -195,6 +195,15 @@ static u32 hpre_pf_q_num = HPRE_PF_DEF_Q_NUM; module_param_cb(hpre_pf_q_num, &hpre_pf_q_num_ops, &hpre_pf_q_num, 0444); MODULE_PARM_DESC(hpre_pf_q_num, "Number of queues in PF of CS(1-1024)"); +static const struct kernel_param_ops vfs_num_ops = { + .set = vfs_num_set, + .get = param_get_int, +}; + +static u32 vfs_num; +module_param_cb(vfs_num, &vfs_num_ops, &vfs_num, 0444); +MODULE_PARM_DESC(vfs_num, "Number of VFs to enable(1-63), 0(default)"); + struct hisi_qp *hpre_create_qp(void) { int node = cpu_to_node(smp_processor_id()); @@ -777,8 +786,18 @@ static int hpre_probe(struct pci_dev *pdev, const struct pci_device_id *id) pci_err(pdev, "fail to register algs to crypto!\n"); goto err_with_qm_start; } + + if (qm->fun_type == QM_HW_PF && vfs_num) { + ret = hisi_qm_sriov_enable(pdev, vfs_num); + if (ret < 0) + goto err_with_crypto_register; + } + return 0; +err_with_crypto_register: + hpre_algs_unregister(); + err_with_qm_start: hisi_qm_del_from_list(qm, &hpre_devices); hisi_qm_stop(qm); |