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authorMeng Yu <yumeng18@huawei.com>2021-03-04 07:35:45 +0100
committerHerbert Xu <herbert@gondor.apana.org.au>2021-03-12 14:04:02 +0100
commit9b94ae729068f6608ec7364dea891ee86dd3dad2 (patch)
treeae12501b0926b058c2a2b94006585e8e06d90f54 /drivers/crypto/hisilicon/hpre/hpre_main.c
parentcrypto: hisilicon/hpre - add version adapt to new algorithms (diff)
downloadlinux-9b94ae729068f6608ec7364dea891ee86dd3dad2.tar.xz
linux-9b94ae729068f6608ec7364dea891ee86dd3dad2.zip
crypto: hisilicon/hpre - add algorithm type
Algorithm type is brought in to get hardware HPRE queue to support different algorithms. Signed-off-by: Meng Yu <yumeng18@huawei.com> Reviewed-by: Zaibo Xu <xuzaibo@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/hisilicon/hpre/hpre_main.c')
-rw-r--r--drivers/crypto/hisilicon/hpre/hpre_main.c11
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/crypto/hisilicon/hpre/hpre_main.c b/drivers/crypto/hisilicon/hpre/hpre_main.c
index e7a2c70eb9cf..76f0a87c584d 100644
--- a/drivers/crypto/hisilicon/hpre/hpre_main.c
+++ b/drivers/crypto/hisilicon/hpre/hpre_main.c
@@ -226,13 +226,20 @@ static u32 vfs_num;
module_param_cb(vfs_num, &vfs_num_ops, &vfs_num, 0444);
MODULE_PARM_DESC(vfs_num, "Number of VFs to enable(1-63), 0(default)");
-struct hisi_qp *hpre_create_qp(void)
+struct hisi_qp *hpre_create_qp(u8 type)
{
int node = cpu_to_node(smp_processor_id());
struct hisi_qp *qp = NULL;
int ret;
- ret = hisi_qm_alloc_qps_node(&hpre_devices, 1, 0, node, &qp);
+ if (type != HPRE_V2_ALG_TYPE && type != HPRE_V3_ECC_ALG_TYPE)
+ return NULL;
+
+ /*
+ * type: 0 - RSA/DH. algorithm supported in V2,
+ * 1 - ECC algorithm in V3.
+ */
+ ret = hisi_qm_alloc_qps_node(&hpre_devices, 1, type, node, &qp);
if (!ret)
return qp;