diff options
author | Jack Xu <jack.xu@intel.com> | 2020-11-06 12:28:08 +0100 |
---|---|---|
committer | Herbert Xu <herbert@gondor.apana.org.au> | 2020-11-13 10:38:54 +0100 |
commit | bd684d83c789dd4882a539075e45d46011a95bdf (patch) | |
tree | f3b3de7e8605c836d679c06b03b9858587c20ece /drivers/crypto/qat/qat_common/qat_hal.c | |
parent | crypto: qat - allow to target specific AEs (diff) | |
download | linux-bd684d83c789dd4882a539075e45d46011a95bdf.tar.xz linux-bd684d83c789dd4882a539075e45d46011a95bdf.zip |
crypto: qat - add support for shared ustore
Add support for shared ustore mode support. This is required by the next
generation of QAT devices to share the same fw image across engines.
Signed-off-by: Jack Xu <jack.xu@intel.com>
Co-developed-by: Wojciech Ziemba <wojciech.ziemba@intel.com>
Signed-off-by: Wojciech Ziemba <wojciech.ziemba@intel.com>
Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/qat/qat_common/qat_hal.c')
-rw-r--r-- | drivers/crypto/qat/qat_common/qat_hal.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/crypto/qat/qat_common/qat_hal.c b/drivers/crypto/qat/qat_common/qat_hal.c index 94c0b04088b5..6ccfb8cf3a07 100644 --- a/drivers/crypto/qat/qat_common/qat_hal.c +++ b/drivers/crypto/qat/qat_common/qat_hal.c @@ -707,6 +707,7 @@ static int qat_hal_chip_init(struct icp_qat_fw_loader_handle *handle, handle->chip_info->wakeup_event_val = WAKEUP_EVENT; handle->chip_info->fw_auth = true; handle->chip_info->css_3k = false; + handle->chip_info->tgroup_share_ustore = false; handle->chip_info->fcu_ctl_csr = FCU_CONTROL; handle->chip_info->fcu_sts_csr = FCU_STATUS; handle->chip_info->fcu_dram_addr_hi = FCU_DRAM_ADDR_HI; @@ -725,6 +726,7 @@ static int qat_hal_chip_init(struct icp_qat_fw_loader_handle *handle, handle->chip_info->wakeup_event_val = WAKEUP_EVENT; handle->chip_info->fw_auth = false; handle->chip_info->css_3k = false; + handle->chip_info->tgroup_share_ustore = false; handle->chip_info->fcu_ctl_csr = 0; handle->chip_info->fcu_sts_csr = 0; handle->chip_info->fcu_dram_addr_hi = 0; |