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| author | Alison Schofield <alison.schofield@intel.com> | 2021-10-29 21:51:59 +0200 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2021-11-15 20:03:00 +0100 |
| commit | fd49f99c180996cef2d707ad71bee4f060dbe367 (patch) | |
| tree | 5a47323f69f054f967b8341ee4ad0757a6878b18 /drivers/cxl | |
| parent | cxl/test: Mock acpi_table_parse_cedt() (diff) | |
| download | linux-fd49f99c180996cef2d707ad71bee4f060dbe367.tar.xz linux-fd49f99c180996cef2d707ad71bee4f060dbe367.zip | |
ACPI: NUMA: Add a node and memblk for each CFMWS not in SRAT
During NUMA init, CXL memory defined in the SRAT Memory Affinity
subtable may be assigned to a NUMA node. Since there is no
requirement that the SRAT be comprehensive for CXL memory another
mechanism is needed to assign NUMA nodes to CXL memory not identified
in the SRAT.
Use the CXL Fixed Memory Window Structure (CFMWS) of the ACPI CXL
Early Discovery Table (CEDT) to find all CXL memory ranges.
Create a NUMA node for each CFMWS that is not already assigned to
a NUMA node. Add a memblk attaching its host physical address
range to the node.
Note that these ranges may not actually map any memory at boot time.
They may describe persistent capacity or may be present to enable
hot-plug.
Consumers can use phys_to_target_node() to discover the NUMA node.
Signed-off-by: Alison Schofield <alison.schofield@intel.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Link: https://lore.kernel.org/r/163553711933.2509508.2203471175679990.stgit@dwillia2-desk3.amr.corp.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/cxl')
| -rw-r--r-- | drivers/cxl/acpi.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c index 91e4072e7649..3163167ecc3a 100644 --- a/drivers/cxl/acpi.c +++ b/drivers/cxl/acpi.c @@ -125,7 +125,8 @@ static int cxl_parse_cfmws(union acpi_subtable_headers *header, void *arg, cfmws->base_hpa + cfmws->window_size - 1); return 0; } - dev_dbg(dev, "add: %s range %#llx-%#llx\n", dev_name(&cxld->dev), + dev_dbg(dev, "add: %s node: %d range %#llx-%#llx\n", + dev_name(&cxld->dev), phys_to_target_node(cxld->range.start), cfmws->base_hpa, cfmws->base_hpa + cfmws->window_size - 1); return 0; |