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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2016-03-18 13:26:36 +0100
committerVinod Koul <vinod.koul@intel.com>2016-04-04 18:42:00 +0200
commit17b3cf4233d77698df0e5ff39303c145ac355d6a (patch)
tree4bb92300c5afd6b07eb9213caae2e9e307fe1858 /drivers/dma/hsu
parentdmaengine: hsu: don't check direction of timeouted channel (diff)
downloadlinux-17b3cf4233d77698df0e5ff39303c145ac355d6a.tar.xz
linux-17b3cf4233d77698df0e5ff39303c145ac355d6a.zip
dmaengine: hsu: set maximum allowed segment size for DMA
This tells, for example, IOMMU what the maximum size of a segment the DMA controller can send. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma/hsu')
-rw-r--r--drivers/dma/hsu/hsu.c2
-rw-r--r--drivers/dma/hsu/hsu.h4
2 files changed, 6 insertions, 0 deletions
diff --git a/drivers/dma/hsu/hsu.c b/drivers/dma/hsu/hsu.c
index 1817b7bc9576..59d1e7c6fd0f 100644
--- a/drivers/dma/hsu/hsu.c
+++ b/drivers/dma/hsu/hsu.c
@@ -417,6 +417,8 @@ int hsu_dma_probe(struct hsu_dma_chip *chip)
hsu->dma.dev = chip->dev;
+ dma_set_max_seg_size(hsu->dma.dev, HSU_CH_DxTSR_MASK);
+
ret = dma_async_device_register(&hsu->dma);
if (ret)
return ret;
diff --git a/drivers/dma/hsu/hsu.h b/drivers/dma/hsu/hsu.h
index 578a8ee8cd05..50a9d1bda253 100644
--- a/drivers/dma/hsu/hsu.h
+++ b/drivers/dma/hsu/hsu.h
@@ -55,6 +55,10 @@
#define HSU_CH_DCR_CHEI BIT(23)
#define HSU_CH_DCR_CHTOI(x) BIT(24 + (x))
+/* Bits in HSU_CH_DxTSR */
+#define HSU_CH_DxTSR_MASK GENMASK(15, 0)
+#define HSU_CH_DxTSR_TSR(x) ((x) & HSU_CH_DxTSR_MASK)
+
struct hsu_dma_sg {
dma_addr_t addr;
unsigned int len;