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authorElliot Berman <eberman@codeaurora.org>2020-01-07 22:04:26 +0100
committerBjorn Andersson <bjorn.andersson@linaro.org>2020-01-08 07:14:43 +0100
commit9a434cee773ae15309ac225f27551b5492618e4a (patch)
tree26d7deff138efa039629a0611ada779626d552e5 /drivers/firmware/qcom_scm-64.c
parentfirmware: qcom_scm: Remove thin wrappers (diff)
downloadlinux-9a434cee773ae15309ac225f27551b5492618e4a.tar.xz
linux-9a434cee773ae15309ac225f27551b5492618e4a.zip
firmware: qcom_scm: Dynamically support SMCCC and legacy conventions
Dynamically support SMCCCC and legacy conventions by detecting which convention to use at runtime. qcom_scm_call_atomic and qcom_scm_call can then be moved in qcom_scm.c and use underlying convention backend as appropriate. Thus, rename qcom_scm-64,-32 to reflect that they are backends for -smc and -legacy, respectively. Also add support for making SCM calls earlier than when SCM driver probes to support use cases such as qcom_scm_set_cold_boot_addr. Support is added by lazily initializing the convention and guarding the query with a spin lock. The limitation of these early SCM calls is that they cannot use DMA, as in the case of >4 arguments for SMC convention and any non-atomic call for legacy convention. Tested-by: Brian Masney <masneyb@onstation.org> # arm32 Tested-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Elliot Berman <eberman@codeaurora.org> Link: https://lore.kernel.org/r/1578431066-19600-18-git-send-email-eberman@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'drivers/firmware/qcom_scm-64.c')
-rw-r--r--drivers/firmware/qcom_scm-64.c236
1 files changed, 0 insertions, 236 deletions
diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c
deleted file mode 100644
index 4defc7c6f4cd..000000000000
--- a/drivers/firmware/qcom_scm-64.c
+++ /dev/null
@@ -1,236 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/* Copyright (c) 2015,2019 The Linux Foundation. All rights reserved.
- */
-
-#include <linux/io.h>
-#include <linux/errno.h>
-#include <linux/delay.h>
-#include <linux/mutex.h>
-#include <linux/slab.h>
-#include <linux/types.h>
-#include <linux/qcom_scm.h>
-#include <linux/arm-smccc.h>
-#include <linux/dma-mapping.h>
-
-#include "qcom_scm.h"
-
-#define SCM_SMC_FNID(s, c) ((((s) & 0xFF) << 8) | ((c) & 0xFF))
-
-/**
- * struct arm_smccc_args
- * @args: The array of values used in registers in smc instruction
- */
-struct arm_smccc_args {
- unsigned long args[8];
-};
-
-static u64 qcom_smccc_convention = -1;
-static DEFINE_MUTEX(qcom_scm_lock);
-
-#define QCOM_SCM_EBUSY_WAIT_MS 30
-#define QCOM_SCM_EBUSY_MAX_RETRY 20
-
-#define SCM_SMC_N_REG_ARGS 4
-#define SCM_SMC_FIRST_EXT_IDX (SCM_SMC_N_REG_ARGS - 1)
-#define SCM_SMC_N_EXT_ARGS (MAX_QCOM_SCM_ARGS - SCM_SMC_N_REG_ARGS + 1)
-#define SCM_SMC_FIRST_REG_IDX 2
-#define SCM_SMC_LAST_REG_IDX (SCM_SMC_FIRST_REG_IDX + SCM_SMC_N_REG_ARGS - 1)
-
-static void __scm_smc_do_quirk(const struct arm_smccc_args *smc,
- struct arm_smccc_res *res)
-{
- unsigned long a0 = smc->args[0];
- struct arm_smccc_quirk quirk = { .id = ARM_SMCCC_QUIRK_QCOM_A6 };
-
- quirk.state.a6 = 0;
-
- do {
- arm_smccc_smc_quirk(a0, smc->args[1], smc->args[2],
- smc->args[3], smc->args[4], smc->args[5],
- quirk.state.a6, smc->args[7], res, &quirk);
-
- if (res->a0 == QCOM_SCM_INTERRUPTED)
- a0 = res->a0;
-
- } while (res->a0 == QCOM_SCM_INTERRUPTED);
-}
-
-static void __scm_smc_do(const struct arm_smccc_args *smc,
- struct arm_smccc_res *res, bool atomic)
-{
- int retry_count = 0;
-
- if (atomic) {
- __scm_smc_do_quirk(smc, res);
- return;
- }
-
- do {
- mutex_lock(&qcom_scm_lock);
-
- __scm_smc_do_quirk(smc, res);
-
- mutex_unlock(&qcom_scm_lock);
-
- if (res->a0 == QCOM_SCM_V2_EBUSY) {
- if (retry_count++ > QCOM_SCM_EBUSY_MAX_RETRY)
- break;
- msleep(QCOM_SCM_EBUSY_WAIT_MS);
- }
- } while (res->a0 == QCOM_SCM_V2_EBUSY);
-}
-
-static int __scm_smc_call(struct device *dev, const struct qcom_scm_desc *desc,
- struct qcom_scm_res *res, bool atomic)
-{
- int arglen = desc->arginfo & 0xf;
- int i;
- dma_addr_t args_phys = 0;
- void *args_virt = NULL;
- size_t alloc_len;
- gfp_t flag = atomic ? GFP_ATOMIC : GFP_KERNEL;
- u32 smccc_call_type = atomic ? ARM_SMCCC_FAST_CALL : ARM_SMCCC_STD_CALL;
- struct arm_smccc_res smc_res;
- struct arm_smccc_args smc = {0};
-
- smc.args[0] = ARM_SMCCC_CALL_VAL(
- smccc_call_type,
- qcom_smccc_convention,
- desc->owner,
- SCM_SMC_FNID(desc->svc, desc->cmd));
- smc.args[1] = desc->arginfo;
- for (i = 0; i < SCM_SMC_N_REG_ARGS; i++)
- smc.args[i + SCM_SMC_FIRST_REG_IDX] = desc->args[i];
-
- if (unlikely(arglen > SCM_SMC_N_REG_ARGS)) {
- alloc_len = SCM_SMC_N_EXT_ARGS * sizeof(u64);
- args_virt = kzalloc(PAGE_ALIGN(alloc_len), flag);
-
- if (!args_virt)
- return -ENOMEM;
-
- if (qcom_smccc_convention == ARM_SMCCC_SMC_32) {
- __le32 *args = args_virt;
-
- for (i = 0; i < SCM_SMC_N_EXT_ARGS; i++)
- args[i] = cpu_to_le32(desc->args[i +
- SCM_SMC_FIRST_EXT_IDX]);
- } else {
- __le64 *args = args_virt;
-
- for (i = 0; i < SCM_SMC_N_EXT_ARGS; i++)
- args[i] = cpu_to_le64(desc->args[i +
- SCM_SMC_FIRST_EXT_IDX]);
- }
-
- args_phys = dma_map_single(dev, args_virt, alloc_len,
- DMA_TO_DEVICE);
-
- if (dma_mapping_error(dev, args_phys)) {
- kfree(args_virt);
- return -ENOMEM;
- }
-
- smc.args[SCM_SMC_LAST_REG_IDX] = args_phys;
- }
-
- __scm_smc_do(&smc, &smc_res, atomic);
-
- if (args_virt) {
- dma_unmap_single(dev, args_phys, alloc_len, DMA_TO_DEVICE);
- kfree(args_virt);
- }
-
- if (res) {
- res->result[0] = smc_res.a1;
- res->result[1] = smc_res.a2;
- res->result[2] = smc_res.a3;
- }
-
- return (long)smc_res.a0 ? qcom_scm_remap_error(smc_res.a0) : 0;
-}
-
-/**
- * qcom_scm_call() - Invoke a syscall in the secure world
- * @dev: device
- * @svc_id: service identifier
- * @cmd_id: command identifier
- * @desc: Descriptor structure containing arguments and return values
- *
- * Sends a command to the SCM and waits for the command to finish processing.
- * This should *only* be called in pre-emptible context.
- */
-int qcom_scm_call(struct device *dev, const struct qcom_scm_desc *desc,
- struct qcom_scm_res *res)
-{
- might_sleep();
- return __scm_smc_call(dev, desc, res, false);
-}
-
-/**
- * qcom_scm_call_atomic() - atomic variation of qcom_scm_call()
- * @dev: device
- * @svc_id: service identifier
- * @cmd_id: command identifier
- * @desc: Descriptor structure containing arguments and return values
- * @res: Structure containing results from SMC/HVC call
- *
- * Sends a command to the SCM and waits for the command to finish processing.
- * This can be called in atomic context.
- */
-int qcom_scm_call_atomic(struct device *dev, const struct qcom_scm_desc *desc,
- struct qcom_scm_res *res)
-{
- return __scm_smc_call(dev, desc, res, true);
-}
-
-int __qcom_scm_is_call_available(struct device *dev, u32 svc_id, u32 cmd_id)
-{
- int ret;
- struct qcom_scm_desc desc = {
- .svc = QCOM_SCM_SVC_INFO,
- .cmd = QCOM_SCM_INFO_IS_CALL_AVAIL,
- .owner = ARM_SMCCC_OWNER_SIP,
- };
- struct qcom_scm_res res;
-
- desc.arginfo = QCOM_SCM_ARGS(1);
- desc.args[0] = SCM_SMC_FNID(svc_id, cmd_id) |
- (ARM_SMCCC_OWNER_SIP << ARM_SMCCC_OWNER_SHIFT);
-
- ret = qcom_scm_call(dev, &desc, &res);
-
- return ret ? : res.result[0];
-}
-
-void __qcom_scm_init(void)
-{
- struct qcom_scm_desc desc = {
- .svc = QCOM_SCM_SVC_INFO,
- .cmd = QCOM_SCM_INFO_IS_CALL_AVAIL,
- .args[0] = SCM_SMC_FNID(QCOM_SCM_SVC_INFO,
- QCOM_SCM_INFO_IS_CALL_AVAIL) |
- (ARM_SMCCC_OWNER_SIP << ARM_SMCCC_OWNER_SHIFT),
- .arginfo = QCOM_SCM_ARGS(1),
- .owner = ARM_SMCCC_OWNER_SIP,
- };
- struct qcom_scm_res res;
- int ret;
-
- qcom_smccc_convention = ARM_SMCCC_SMC_64;
- // Device isn't required as there is only one argument - no device
- // needed to dma_map_single to secure world
- ret = qcom_scm_call_atomic(NULL, &desc, &res);
- if (!ret && res.result[0] == 1)
- goto out;
-
- qcom_smccc_convention = ARM_SMCCC_SMC_32;
- ret = qcom_scm_call_atomic(NULL, &desc, &res);
- if (!ret && res.result[0] == 1)
- goto out;
-
- qcom_smccc_convention = -1;
- BUG();
-out:
- pr_info("QCOM SCM SMC Convention: %lld\n", qcom_smccc_convention);
-}