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authorCharles Perry <charles.perry@savoirfairelinux.com>2024-03-21 23:04:35 +0100
committerXu Yilun <yilun.xu@linux.intel.com>2024-03-31 16:44:21 +0200
commit104712a0866f7e3eb050271fc104c543aac642e8 (patch)
tree40bfda05cbf771f551c616945d538201453feebb /drivers/fpga/Kconfig
parentdt-bindings: fpga: xlnx,fpga-selectmap: add DT schema (diff)
downloadlinux-104712a0866f7e3eb050271fc104c543aac642e8.tar.xz
linux-104712a0866f7e3eb050271fc104c543aac642e8.zip
fpga: xilinx-selectmap: add new driver
Xilinx 7 series FPGA can be programmed using a parallel port named the SelectMAP interface in the datasheet. This interface is compatible with the i.MX6 EIM bus controller but other types of external memory mapped parallel bus might work. xilinx-selectmap currently only supports the x8 mode where data is loaded at one byte per rising edge of the clock, with the MSb of each byte presented to the D0 pin. Signed-off-by: Charles Perry <charles.perry@savoirfairelinux.com> [yilun.xu@linux.intel.com: replace data type of i from u32 to size_t] Acked-by: Xu Yilun <yilun.xu@intel.com> Link: https://lore.kernel.org/r/20240321220447.3260065-4-charles.perry@savoirfairelinux.com Signed-off-by: Xu Yilun <yilun.xu@linux.intel.com>
Diffstat (limited to 'drivers/fpga/Kconfig')
-rw-r--r--drivers/fpga/Kconfig8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index d27a1ebf4083..37b35f58f0df 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -67,6 +67,14 @@ config FPGA_MGR_STRATIX10_SOC
config FPGA_MGR_XILINX_CORE
tristate
+config FPGA_MGR_XILINX_SELECTMAP
+ tristate "Xilinx Configuration over SelectMAP"
+ depends on HAS_IOMEM
+ select FPGA_MGR_XILINX_CORE
+ help
+ FPGA manager driver support for Xilinx FPGA configuration
+ over SelectMAP interface.
+
config FPGA_MGR_XILINX_SPI
tristate "Xilinx Configuration over Slave Serial (SPI)"
depends on SPI