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author | Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com> | 2023-09-13 22:49:41 +0200 |
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committer | David S. Miller <davem@davemloft.net> | 2023-09-17 12:50:20 +0200 |
commit | d7999f5ea64bb10d2857b8cbfe973be373bac7c9 (patch) | |
tree | fe2a9c0ef7ea1bfe2acdbe696513118cc075fd51 /drivers/fsi/fsi-core.c | |
parent | ice: add admin commands to access cgu configuration (diff) | |
download | linux-d7999f5ea64bb10d2857b8cbfe973be373bac7c9.tar.xz linux-d7999f5ea64bb10d2857b8cbfe973be373bac7c9.zip |
ice: implement dpll interface to control cgu
Control over clock generation unit is required for further development
of Synchronous Ethernet feature. Interface provides ability to obtain
current state of a dpll, its sources and outputs which are pins, and
allows their configuration.
Co-developed-by: Milena Olech <milena.olech@intel.com>
Signed-off-by: Milena Olech <milena.olech@intel.com>
Co-developed-by: Michal Michalik <michal.michalik@intel.com>
Signed-off-by: Michal Michalik <michal.michalik@intel.com>
Signed-off-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
Signed-off-by: Vadim Fedorenko <vadim.fedorenko@linux.dev>
Signed-off-by: Jiri Pirko <jiri@nvidia.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/fsi/fsi-core.c')
0 files changed, 0 insertions, 0 deletions