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author | Tao Zhou <tao.zhou1@amd.com> | 2021-09-17 12:15:23 +0200 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2021-09-28 15:30:06 +0200 |
commit | ca5c636dc6a274693c5c3b4229f16e775d428b7f (patch) | |
tree | 1a181564139910ba93263fa0de31b36860461976 /drivers/gpu/drm/amd/amdgpu/df_v3_6.c | |
parent | drm/amdgpu: Update PSP TA Invoke to use common TA context as input (diff) | |
download | linux-ca5c636dc6a274693c5c3b4229f16e775d428b7f.tar.xz linux-ca5c636dc6a274693c5c3b4229f16e775d428b7f.zip |
drm/amdgpu: add poison mode query for DF (v2)
Add ras poison mode query interface for DF.
v2: replace RREG32_PCIE with RREG32_SOC15.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/df_v3_6.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/df_v3_6.c | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/df_v3_6.c b/drivers/gpu/drm/amd/amdgpu/df_v3_6.c index 14514a145c17..43c5e3ec9a39 100644 --- a/drivers/gpu/drm/amd/amdgpu/df_v3_6.c +++ b/drivers/gpu/drm/amd/amdgpu/df_v3_6.c @@ -637,6 +637,36 @@ static void df_v3_6_pmc_get_count(struct amdgpu_device *adev, } } +static bool df_v3_6_query_ras_poison_mode(struct amdgpu_device *adev) +{ + uint32_t hw_assert_msklo, hw_assert_mskhi; + uint32_t v0, v1, v28, v31; + + hw_assert_msklo = RREG32_SOC15(DF, 0, + mmDF_CS_UMC_AON0_HardwareAssertMaskLow); + hw_assert_mskhi = RREG32_SOC15(DF, 0, + mmDF_NCS_PG0_HardwareAssertMaskHigh); + + v0 = REG_GET_FIELD(hw_assert_msklo, + DF_CS_UMC_AON0_HardwareAssertMaskLow, HWAssertMsk0); + v1 = REG_GET_FIELD(hw_assert_msklo, + DF_CS_UMC_AON0_HardwareAssertMaskLow, HWAssertMsk1); + v28 = REG_GET_FIELD(hw_assert_mskhi, + DF_NCS_PG0_HardwareAssertMaskHigh, HWAssertMsk28); + v31 = REG_GET_FIELD(hw_assert_mskhi, + DF_NCS_PG0_HardwareAssertMaskHigh, HWAssertMsk31); + + if (v0 && v1 && v28 && v31) + return true; + else if (!v0 && !v1 && !v28 && !v31) + return false; + else { + dev_warn(adev->dev, "DF poison setting is inconsistent(%d:%d:%d:%d)!\n", + v0, v1, v28, v31); + return false; + } +} + const struct amdgpu_df_funcs df_v3_6_funcs = { .sw_init = df_v3_6_sw_init, .sw_fini = df_v3_6_sw_fini, @@ -651,4 +681,5 @@ const struct amdgpu_df_funcs df_v3_6_funcs = { .pmc_get_count = df_v3_6_pmc_get_count, .get_fica = df_v3_6_get_fica, .set_fica = df_v3_6_set_fica, + .query_ras_poison_mode = df_v3_6_query_ras_poison_mode, }; |