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authorHuang Rui <ray.huang@amd.com>2017-02-28 09:13:32 +0100
committerAlex Deucher <alexander.deucher@amd.com>2017-05-24 23:41:15 +0200
commit13cfe5d07606e3978de7d4286b3052acd75af67d (patch)
tree3234834b4d24a1a9b3959cd403bae0ca38a1d0a6 /drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
parentdrm/amdgpu: init sdma power gating for raven (diff)
downloadlinux-13cfe5d07606e3978de7d4286b3052acd75af67d.tar.xz
linux-13cfe5d07606e3978de7d4286b3052acd75af67d.zip
drm/amdgpu/sdma4: add dynamic power gating for raven
Add the functions to enable dynamic powergating. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c33
1 files changed, 33 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index 3d24e50aa34c..e4825a301b6f 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -669,6 +669,27 @@ static int sdma_v4_0_gfx_resume(struct amdgpu_device *adev)
return 0;
}
+static void
+sdma_v4_1_update_power_gating(struct amdgpu_device *adev, bool enable)
+{
+ uint32_t def, data;
+
+ if (enable && (adev->pg_flags & AMD_PG_SUPPORT_SDMA)) {
+ /* disable idle interrupt */
+ def = data = RREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_CNTL));
+ data |= SDMA0_CNTL__CTXEMPTY_INT_ENABLE_MASK;
+
+ if (data != def)
+ WREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_CNTL), data);
+ } else {
+ /* disable idle interrupt */
+ def = data = RREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_CNTL));
+ data &= ~SDMA0_CNTL__CTXEMPTY_INT_ENABLE_MASK;
+ if (data != def)
+ WREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_CNTL), data);
+ }
+}
+
static void sdma_v4_1_init_power_gating(struct amdgpu_device *adev)
{
uint32_t def, data;
@@ -704,6 +725,7 @@ static void sdma_v4_0_init_pg(struct amdgpu_device *adev)
switch (adev->asic_type) {
case CHIP_RAVEN:
sdma_v4_1_init_power_gating(adev);
+ sdma_v4_1_update_power_gating(adev, true);
break;
default:
break;
@@ -1502,6 +1524,17 @@ static int sdma_v4_0_set_clockgating_state(void *handle,
static int sdma_v4_0_set_powergating_state(void *handle,
enum amd_powergating_state state)
{
+ struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+
+ switch (adev->asic_type) {
+ case CHIP_RAVEN:
+ sdma_v4_1_update_power_gating(adev,
+ state == AMD_PG_STATE_GATE ? true : false);
+ break;
+ default:
+ break;
+ }
+
return 0;
}