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author | Evan Quan <evan.quan@amd.com> | 2018-07-10 05:35:16 +0200 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2018-07-13 21:45:16 +0200 |
commit | ed515ce2748007385347d70ec2779d6aef2cf5f0 (patch) | |
tree | e5a6282f87e08672b047943fb1578c47474305ba /drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | |
parent | drm/amd/powerplay: no need to mask workable gfxoff feature for vega12 (diff) | |
download | linux-ed515ce2748007385347d70ec2779d6aef2cf5f0.tar.xz linux-ed515ce2748007385347d70ec2779d6aef2cf5f0.zip |
drm/amd/powerplay: convert the sclk/mclk into Mhz for comparation
Convert the clocks into right Mhz unit. Otherwise, it will miss
the equal situation.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c')
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c index cae76fe65881..c0ceb69a23b0 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c @@ -1881,7 +1881,7 @@ static int vega12_print_clock_levels(struct pp_hwmgr *hwmgr, for (i = 0; i < clocks.num_levels; i++) size += sprintf(buf + size, "%d: %uMhz %s\n", i, clocks.data[i].clocks_in_khz / 1000, - (clocks.data[i].clocks_in_khz / 1000 == now) ? "*" : ""); + (clocks.data[i].clocks_in_khz / 1000 == now / 100) ? "*" : ""); break; case PP_MCLK: @@ -1897,7 +1897,7 @@ static int vega12_print_clock_levels(struct pp_hwmgr *hwmgr, for (i = 0; i < clocks.num_levels; i++) size += sprintf(buf + size, "%d: %uMhz %s\n", i, clocks.data[i].clocks_in_khz / 1000, - (clocks.data[i].clocks_in_khz / 1000 == now) ? "*" : ""); + (clocks.data[i].clocks_in_khz / 1000 == now / 100) ? "*" : ""); break; case PP_PCIE: |