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authorShirish S <shirish.s@amd.com>2018-10-25 23:08:58 +0200
committerAlex Deucher <alexander.deucher@amd.com>2018-10-26 20:34:44 +0200
commitcb899a615be6c42e186e0e71862ebbd5a5c15533 (patch)
treebe6d72fc577cbd858a49db0267d34c88616800a6 /drivers/gpu/drm/amd
parentdrm/amdgpu: Fix compute ring 1.0.0 failure after reset (diff)
downloadlinux-cb899a615be6c42e186e0e71862ebbd5a5c15533.tar.xz
linux-cb899a615be6c42e186e0e71862ebbd5a5c15533.zip
drm/amdgpu: fix reporting of failed msg sent to SMU (v2)
Currently send_msg_to_smc_async() only report which message failed, but the actual failing message is the previous one, which SMU is unable to service. This patch reads the contents of register where the SMU is stuck and report appropriately. v2: fix the build (Alex) Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd')
-rw-r--r--drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c
index f836d30fdd44..09b844ec3eab 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c
@@ -71,7 +71,11 @@ static int smu8_send_msg_to_smc_async(struct pp_hwmgr *hwmgr, uint16_t msg)
result = PHM_WAIT_FIELD_UNEQUAL(hwmgr,
SMU_MP1_SRBM2P_RESP_0, CONTENT, 0);
if (result != 0) {
+ /* Read the last message to SMU, to report actual cause */
+ uint32_t val = cgs_read_register(hwmgr->device,
+ mmSMU_MP1_SRBM2P_MSG_0);
pr_err("smu8_send_msg_to_smc_async (0x%04x) failed\n", msg);
+ pr_err("SMU still servicing msg (0x%04x)\n", val);
return result;
}