diff options
author | Liu Ying <victor.liu@nxp.com> | 2023-08-21 05:40:04 +0200 |
---|---|---|
committer | Robert Foss <rfoss@kernel.org> | 2023-10-16 11:38:43 +0200 |
commit | ac87d23694f44af44a98d21dd77016f2756b6b1b (patch) | |
tree | f9460806141f613aa0f9bc3420f39399bef8d431 /drivers/gpu/drm/bridge/synopsys | |
parent | drm/bridge: synopsys: dw-mipi-dsi: Add mode fixup support (diff) | |
download | linux-ac87d23694f44af44a98d21dd77016f2756b6b1b.tar.xz linux-ac87d23694f44af44a98d21dd77016f2756b6b1b.zip |
drm/bridge: synopsys: dw-mipi-dsi: Use pixel clock rate to calculate lbcc
To get better accuration, use pixel clock rate to calculate lbcc instead of
lane_mbps since the pixel clock rate is in KHz while lane_mbps is in MHz.
Without this, distorted image can be seen on a HDMI monitor connected with
i.MX93 11x11 EVK through ADV7535 DSI to HDMI bridge in 1920x1080p@60 video
mode.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Robert Foss <rfoss@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20230821034008.3876938-6-victor.liu@nxp.com
Diffstat (limited to 'drivers/gpu/drm/bridge/synopsys')
-rw-r--r-- | drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c index 40d699428b1b..b21ad4ea9dca 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c @@ -12,6 +12,7 @@ #include <linux/component.h> #include <linux/debugfs.h> #include <linux/iopoll.h> +#include <linux/math64.h> #include <linux/media-bus-format.h> #include <linux/module.h> #include <linux/platform_device.h> @@ -764,8 +765,15 @@ static u32 dw_mipi_dsi_get_hcomponent_lbcc(struct dw_mipi_dsi *dsi, u32 hcomponent) { u32 frac, lbcc; + int bpp; - lbcc = hcomponent * dsi->lane_mbps * MSEC_PER_SEC / 8; + bpp = mipi_dsi_pixel_format_to_bpp(dsi->format); + if (bpp < 0) { + dev_err(dsi->dev, "failed to get bpp\n"); + return 0; + } + + lbcc = div_u64((u64)hcomponent * mode->clock * bpp, dsi->lanes * 8); frac = lbcc % mode->clock; lbcc = lbcc / mode->clock; |