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author | Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com> | 2020-07-08 02:39:50 +0200 |
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committer | Chris Wilson <chris@chris-wilson.co.uk> | 2020-07-08 22:13:09 +0200 |
commit | 0b6613c6b91ec5f437495c438ca047af4e47b423 (patch) | |
tree | 9a6f74c48de4cc95ef881fbb16d2b98b16997ae9 /drivers/gpu/drm/i915/gem/selftests | |
parent | drm/i915/sseu: Move sseu detection and dump to intel_sseu (diff) | |
download | linux-0b6613c6b91ec5f437495c438ca047af4e47b423.tar.xz linux-0b6613c6b91ec5f437495c438ca047af4e47b423.zip |
drm/i915/sseu: Move sseu_info under gt_info
SSEUs are a GT capability, so track them under gt_info.
Signed-off-by: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Andi Shyti <andi.shyti@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20200708003952.21831-8-daniele.ceraolospurio@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/gem/selftests')
-rw-r--r-- | drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c index b81978890641..7ffc3c751432 100644 --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c @@ -1229,7 +1229,7 @@ __igt_ctx_sseu(struct drm_i915_private *i915, int inst = 0; int ret = 0; - if (INTEL_GEN(i915) < 9 || !RUNTIME_INFO(i915)->sseu.has_slice_pg) + if (INTEL_GEN(i915) < 9) return 0; if (flags & TEST_RESET) @@ -1255,6 +1255,9 @@ __igt_ctx_sseu(struct drm_i915_private *i915, if (hweight32(engine->sseu.slice_mask) < 2) continue; + if (!engine->gt->info.sseu.has_slice_pg) + continue; + /* * Gen11 VME friendly power-gated configuration with * half enabled sub-slices. |