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authorVenkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>2020-07-08 02:39:50 +0200
committerChris Wilson <chris@chris-wilson.co.uk>2020-07-08 22:13:09 +0200
commit0b6613c6b91ec5f437495c438ca047af4e47b423 (patch)
tree9a6f74c48de4cc95ef881fbb16d2b98b16997ae9 /drivers/gpu/drm/i915/gt/intel_context_sseu.c
parentdrm/i915/sseu: Move sseu detection and dump to intel_sseu (diff)
downloadlinux-0b6613c6b91ec5f437495c438ca047af4e47b423.tar.xz
linux-0b6613c6b91ec5f437495c438ca047af4e47b423.zip
drm/i915/sseu: Move sseu_info under gt_info
SSEUs are a GT capability, so track them under gt_info. Signed-off-by: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Andi Shyti <andi.shyti@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20200708003952.21831-8-daniele.ceraolospurio@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_context_sseu.c')
-rw-r--r--drivers/gpu/drm/i915/gt/intel_context_sseu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_context_sseu.c b/drivers/gpu/drm/i915/gt/intel_context_sseu.c
index 27ae48049239..b9c8163978a3 100644
--- a/drivers/gpu/drm/i915/gt/intel_context_sseu.c
+++ b/drivers/gpu/drm/i915/gt/intel_context_sseu.c
@@ -30,7 +30,7 @@ static int gen8_emit_rpcs_config(struct i915_request *rq,
*cs++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT;
*cs++ = lower_32_bits(offset);
*cs++ = upper_32_bits(offset);
- *cs++ = intel_sseu_make_rpcs(rq->engine->i915, &sseu);
+ *cs++ = intel_sseu_make_rpcs(rq->engine->gt, &sseu);
intel_ring_advance(rq, cs);