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authorJordan Crouse <jcrouse@codeaurora.org>2020-09-15 00:40:21 +0200
committerRob Clark <robdclark@chromium.org>2020-09-15 19:47:44 +0200
commit8907afb476ac6754a4d1ba8d2dd16dbb0fd4d428 (patch)
tree83fcdc3ffc6d3bc760a6b5a607f12b5ab605275f /drivers/gpu/drm/msm/adreno/a5xx_power.c
parentdrm/msm: Show process names in gem_describe (diff)
downloadlinux-8907afb476ac6754a4d1ba8d2dd16dbb0fd4d428.tar.xz
linux-8907afb476ac6754a4d1ba8d2dd16dbb0fd4d428.zip
drm/msm: Allow a5xx to mark the RPTR shadow as privileged
Newer microcode versions have support for the CP_WHERE_AM_I opcode which allows the RPTR shadow memory to be marked as privileged to protect it from corruption. Move the RPTR shadow into its own buffer and protect it it if the current microcode version supports the new feature. We can also re-enable preemption for those targets that support CP_WHERE_AM_I. Start out by preemptively assuming that we can enable preemption and disable it in a5xx_hw_init if the microcode version comes back as too old. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu/drm/msm/adreno/a5xx_power.c')
-rw-r--r--drivers/gpu/drm/msm/adreno/a5xx_power.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_power.c b/drivers/gpu/drm/msm/adreno/a5xx_power.c
index 321a8061fd32..f176a6f3eff6 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_power.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_power.c
@@ -240,7 +240,7 @@ static int a5xx_gpmu_init(struct msm_gpu *gpu)
OUT_PKT7(ring, CP_SET_PROTECTED_MODE, 1);
OUT_RING(ring, 1);
- gpu->funcs->flush(gpu, ring);
+ a5xx_flush(gpu, ring, true);
if (!a5xx_idle(gpu, ring)) {
DRM_ERROR("%s: Unable to load GPMU firmware. GPMU will not be active\n",