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| author | Akhil P Oommen <quic_akhilpo@quicinc.com> | 2024-06-29 03:49:35 +0200 |
|---|---|---|
| committer | Rob Clark <robdclark@chromium.org> | 2024-06-29 22:45:30 +0200 |
| commit | d6225e0cd096ade35b136a7d2cc5f4f2da63971c (patch) | |
| tree | ff3eec02a94f2db204c082ab3e83cdbbc1b63746 /drivers/gpu/drm/msm/adreno/a6xx_gmu.c | |
| parent | dt-bindings: display/msm/gmu: Add Adreno X185 GMU (diff) | |
| download | linux-d6225e0cd096ade35b136a7d2cc5f4f2da63971c.tar.xz linux-d6225e0cd096ade35b136a7d2cc5f4f2da63971c.zip | |
drm/msm/adreno: Add support for X185 GPU
Add support in drm/msm driver for the Adreno X185 gpu found in
Snapdragon X1 Elite chipset.
Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/601399/
Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu/drm/msm/adreno/a6xx_gmu.c')
| -rw-r--r-- | drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c index 09d640165b18..400e5cbe4b35 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c @@ -767,6 +767,7 @@ static int a6xx_gmu_fw_start(struct a6xx_gmu *gmu, unsigned int state) { struct a6xx_gpu *a6xx_gpu = container_of(gmu, struct a6xx_gpu, gmu); struct adreno_gpu *adreno_gpu = &a6xx_gpu->base; + const struct a6xx_info *a6xx_info = adreno_gpu->info->a6xx; u32 fence_range_lower, fence_range_upper; u32 chipid, chipid_min = 0; int ret; @@ -828,8 +829,10 @@ static int a6xx_gmu_fw_start(struct a6xx_gmu *gmu, unsigned int state) */ gmu_write(gmu, REG_A6XX_GMU_CM3_CFG, 0x4052); + if (a6xx_info->gmu_chipid) { + chipid = a6xx_info->gmu_chipid; /* NOTE: A730 may also fall in this if-condition with a future GMU fw update. */ - if (adreno_is_a7xx(adreno_gpu) && !adreno_is_a730(adreno_gpu)) { + } else if (adreno_is_a7xx(adreno_gpu) && !adreno_is_a730(adreno_gpu)) { /* A7xx GPUs have obfuscated chip IDs. Use constant maj = 7 */ chipid = FIELD_PREP(GENMASK(31, 24), 0x7); @@ -1327,7 +1330,13 @@ static int a6xx_gmu_rpmh_arc_votes_init(struct device *dev, u32 *votes, if (!pri_count) return -EINVAL; - sec = cmd_db_read_aux_data("mx.lvl", &sec_count); + /* + * Some targets have a separate gfx mxc rail. So try to read that first and then fall back + * to regular mx rail if it is missing + */ + sec = cmd_db_read_aux_data("gmxc.lvl", &sec_count); + if (IS_ERR(sec) && sec != ERR_PTR(-EPROBE_DEFER)) + sec = cmd_db_read_aux_data("mx.lvl", &sec_count); if (IS_ERR(sec)) return PTR_ERR(sec); |