diff options
| author | Jordan Crouse <jcrouse@codeaurora.org> | 2016-11-28 20:28:33 +0100 |
|---|---|---|
| committer | Rob Clark <robdclark@gmail.com> | 2016-11-28 21:14:15 +0100 |
| commit | b5f103ab98c77ca5998b39533c2b46959fbd37d9 (patch) | |
| tree | 8ec7b28b3c8f575466328e87263ebb39c18a80d8 /drivers/gpu/drm/msm/adreno/adreno_device.c | |
| parent | drm/msm: Disable interrupts during init (diff) | |
| download | linux-b5f103ab98c77ca5998b39533c2b46959fbd37d9.tar.xz linux-b5f103ab98c77ca5998b39533c2b46959fbd37d9.zip | |
drm/msm: gpu: Add A5XX target support
Add support for the A5XX family of Adreno GPUs.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/msm/adreno/adreno_device.c')
| -rw-r--r-- | drivers/gpu/drm/msm/adreno/adreno_device.c | 24 |
1 files changed, 23 insertions, 1 deletions
diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c index 1fa1fdda9ee2..985d95fbb726 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_device.c +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c @@ -74,6 +74,14 @@ static const struct adreno_info gpulist[] = { .pfpfw = "a420_pfp.fw", .gmem = (SZ_1M + SZ_512K), .init = a4xx_gpu_init, + }, { + .rev = ADRENO_REV(5, 3, 0, ANY_ID), + .revn = 530, + .name = "A530", + .pm4fw = "a530_pm4.fw", + .pfpfw = "a530_pfp.fw", + .gmem = SZ_1M, + .init = a5xx_gpu_init, }, }; @@ -83,6 +91,8 @@ MODULE_FIRMWARE("a330_pm4.fw"); MODULE_FIRMWARE("a330_pfp.fw"); MODULE_FIRMWARE("a420_pm4.fw"); MODULE_FIRMWARE("a420_pfp.fw"); +MODULE_FIRMWARE("a530_fm4.fw"); +MODULE_FIRMWARE("a530_pfp.fw"); static inline bool _rev_match(uint8_t entry, uint8_t id) { @@ -170,12 +180,20 @@ static void set_gpu_pdev(struct drm_device *dev, priv->gpu_pdev = pdev; } +static const struct { + const char *str; + uint32_t flag; +} quirks[] = { + { "qcom,gpu-quirk-two-pass-use-wfi", ADRENO_QUIRK_TWO_PASS_USE_WFI }, + { "qcom,gpu-quirk-fault-detect-mask", ADRENO_QUIRK_FAULT_DETECT_MASK }, +}; + static int adreno_bind(struct device *dev, struct device *master, void *data) { static struct adreno_platform_config config = {}; struct device_node *child, *node = dev->of_node; u32 val; - int ret; + int ret, i; ret = of_property_read_u32(node, "qcom,chipid", &val); if (ret) { @@ -209,6 +227,10 @@ static int adreno_bind(struct device *dev, struct device *master, void *data) return -ENXIO; } + for (i = 0; i < ARRAY_SIZE(quirks); i++) + if (of_property_read_bool(node, quirks[i].str)) + config.quirks |= quirks[i].flag; + dev->platform_data = &config; set_gpu_pdev(dev_get_drvdata(master), to_platform_device(dev)); return 0; |