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authorAngeloGioacchino Del Regno <kholk11@gmail.com>2019-10-31 11:43:56 +0100
committerRob Clark <robdclark@chromium.org>2019-11-02 18:20:41 +0100
commit1c2a9f254c26fa9a3e96a922214873880d5333a3 (patch)
treeb9b98cb729d8738380f453197a22f550a323d1d1 /drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h
parentdrm/msm: always dump buffer base/size (diff)
downloadlinux-1c2a9f254c26fa9a3e96a922214873880d5333a3.tar.xz
linux-1c2a9f254c26fa9a3e96a922214873880d5333a3.zip
drm/msm/mdp5: Add optional TBU and TBU_RT clocks
Some SoCs, like MSM8956/8976 (and APQ variants), do feature these clocks and we need to enable them in order to get both of the hw (mdp5/rot) Translation Buffer Units (TBUs) to properly work. Signed-off-by: AngeloGioacchino Del Regno <kholk11@gmail.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h')
-rw-r--r--drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h
index d1bf4fdfc815..128866742593 100644
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h
+++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h
@@ -53,6 +53,8 @@ struct mdp5_kms {
struct clk *ahb_clk;
struct clk *core_clk;
struct clk *lut_clk;
+ struct clk *tbu_clk;
+ struct clk *tbu_rt_clk;
struct clk *vsync_clk;
/*