diff options
author | Alexandre Courbot <acourbot@nvidia.com> | 2017-01-26 07:18:25 +0100 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2017-03-07 08:05:16 +0100 |
commit | 5429f82f341524deb9f66193892a69dea2f862a3 (patch) | |
tree | a0f900c42994617c15931db468e9ea4b24b3804d /drivers/gpu/drm/nouveau/include | |
parent | drm/nouveau/secboot: put HS code loading code into own file (diff) | |
download | linux-5429f82f341524deb9f66193892a69dea2f862a3.tar.xz linux-5429f82f341524deb9f66193892a69dea2f862a3.zip |
drm/nouveau/secboot: add gp102/gp104/gp106/gp107 support
These gp10x chips are supporting using (roughly) the same firmware.
Compared to previous secure chips, ACR runs on SEC2 and so does the
low-secure msgqueue.
ACR for these chips is based on r367.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/include')
-rw-r--r-- | drivers/gpu/drm/nouveau/include/nvkm/subdev/secboot.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/secboot.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/secboot.h index 03da24e2c229..d6a4bdb6573b 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/secboot.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/secboot.h @@ -59,5 +59,6 @@ int nvkm_secboot_reset(struct nvkm_secboot *, enum nvkm_secboot_falcon); int gm200_secboot_new(struct nvkm_device *, int, struct nvkm_secboot **); int gm20b_secboot_new(struct nvkm_device *, int, struct nvkm_secboot **); +int gp102_secboot_new(struct nvkm_device *, int, struct nvkm_secboot **); #endif |