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| author | Ben Skeggs <bskeggs@redhat.com> | 2020-06-22 12:18:06 +0200 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2020-07-24 10:50:58 +0200 |
| commit | 7aa638cfdb285946f989ac1e132e9c3378f26db6 (patch) | |
| tree | 763987bdbbaccf913ab07b3871a38c891471f7cc /drivers/gpu/drm/nouveau/nv84_fence.c | |
| parent | drm/nouveau/gem: convert indirect pushbufs to new push macros (diff) | |
| download | linux-7aa638cfdb285946f989ac1e132e9c3378f26db6.tar.xz linux-7aa638cfdb285946f989ac1e132e9c3378f26db6.zip | |
drm/nouveau/fence: convert emit() to new push macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv84_fence.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nv84_fence.c | 24 |
1 files changed, 13 insertions, 11 deletions
diff --git a/drivers/gpu/drm/nouveau/nv84_fence.c b/drivers/gpu/drm/nouveau/nv84_fence.c index f07da00f285f..0c4b740abea8 100644 --- a/drivers/gpu/drm/nouveau/nv84_fence.c +++ b/drivers/gpu/drm/nouveau/nv84_fence.c @@ -21,7 +21,6 @@ * * Authors: Ben Skeggs */ - #include "nouveau_drv.h" #include "nouveau_dma.h" #include "nouveau_fence.h" @@ -29,20 +28,23 @@ #include "nv50_display.h" +#include <nvif/push206e.h> + static int nv84_fence_emit32(struct nouveau_channel *chan, u64 virtual, u32 sequence) { - int ret = RING_SPACE(chan, 8); + struct nvif_push *push = chan->chan.push; + int ret = PUSH_WAIT(push, 8); if (ret == 0) { - BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1); - OUT_RING (chan, chan->vram.handle); - BEGIN_NV04(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 5); - OUT_RING (chan, upper_32_bits(virtual)); - OUT_RING (chan, lower_32_bits(virtual)); - OUT_RING (chan, sequence); - OUT_RING (chan, NV84_SUBCHAN_SEMAPHORE_TRIGGER_WRITE_LONG); - OUT_RING (chan, 0x00000000); - FIRE_RING (chan); + PUSH_NVSQ(push, NV826F, NV11_SUBCHAN_DMA_SEMAPHORE, chan->vram.handle); + PUSH_NVSQ(push, NV826F, + NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, upper_32_bits(virtual), + NV84_SUBCHAN_SEMAPHORE_ADDRESS_LOW, lower_32_bits(virtual), + NV84_SUBCHAN_SEMAPHORE_SEQUENCE, sequence, + NV84_SUBCHAN_SEMAPHORE_TRIGGER, + NV84_SUBCHAN_SEMAPHORE_TRIGGER_WRITE_LONG, + NV84_SUBCHAN_UEVENT, 0x00000000); + PUSH_KICK(push); } return ret; } |