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| author | David Lu <david.lu@bitland.com.cn> | 2020-04-28 08:45:21 +0200 |
|---|---|---|
| committer | Sam Ravnborg <sam@ravnborg.org> | 2020-05-04 22:18:42 +0200 |
| commit | 42470eec8552e51e98fe89742bd95cc732aac28f (patch) | |
| tree | 6b2c38d08d3bcc74b6e58f0a3f4a056162203fc6 /drivers/gpu/drm/panel | |
| parent | dt-bindings: display: dw_mipi_dsi.txt: convert to yaml (diff) | |
| download | linux-42470eec8552e51e98fe89742bd95cc732aac28f.tar.xz linux-42470eec8552e51e98fe89742bd95cc732aac28f.zip | |
drm/panel: boe-tv101wum-n16: fine tune clock
fix boe_tv105wum_nw0 display shift.
Signed-off-by: David Lu <david.lu@bitland.com.cn>
Fixes: 963518c12431 ("drm/panel: support for boe,tv105wum-nw0 dsi video mode panel")
Cc: David Lu <david.lu@bitland.com.cn>
Cc: Nicolas Boichat <drinkcat@chromium.org>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
[added fixes tag]
Link: https://patchwork.freedesktop.org/patch/msgid/20200428064521.21511-1-david.lu@bitland.com.cn
Diffstat (limited to 'drivers/gpu/drm/panel')
| -rw-r--r-- | drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c index f89861c8598a..46fe1805c588 100644 --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c @@ -697,15 +697,15 @@ static const struct panel_desc auo_b101uan08_3_desc = { }; static const struct drm_display_mode boe_tv105wum_nw0_default_mode = { - .clock = 159260, + .clock = 159916, .hdisplay = 1200, .hsync_start = 1200 + 80, .hsync_end = 1200 + 80 + 24, .htotal = 1200 + 80 + 24 + 60, .vdisplay = 1920, - .vsync_start = 1920 + 10, - .vsync_end = 1920 + 10 + 2, - .vtotal = 1920 + 10 + 2 + 14, + .vsync_start = 1920 + 20, + .vsync_end = 1920 + 20 + 4, + .vtotal = 1920 + 20 + 4 + 10, .vrefresh = 60, .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, }; |