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authorChristian König <christian.koenig@amd.com>2013-08-01 17:34:07 +0200
committerAlex Deucher <alexander.deucher@amd.com>2013-08-07 23:37:11 +0200
commit2858c00d2823c83acce2a1175dbabb2cebee8678 (patch)
tree1751bd3ac36c6749a0fded1775def26b19be2dcb /drivers/gpu/drm/radeon/rv6xx_dpm.c
parentdrm/radeon/dpm: adjust power state properly for UVD on SI (diff)
downloadlinux-2858c00d2823c83acce2a1175dbabb2cebee8678.tar.xz
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drm/radeon: fix halting UVD
Removing the clock/power or resetting the VCPU can cause hangs if that happens in the middle of a register write. Stall the memory and register bus before putting the VCPU into reset. Keep it in reset when unloading the module or suspending. Signed-off-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/rv6xx_dpm.c')
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