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author | Heiko Stuebner <heiko@sntech.de> | 2018-08-30 13:09:37 +0200 |
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committer | Heiko Stuebner <heiko@sntech.de> | 2018-09-05 12:25:48 +0200 |
commit | 428e15cc41e3603942edd4a1aa991127ce9eccea (patch) | |
tree | dfb94cb0e69b27e396afd2fced5a5fb846e6ef73 /drivers/gpu/drm/rockchip/rockchip_vop_reg.h | |
parent | drm/rockchip: vop: Add directly output rgb feature for px30 (diff) | |
download | linux-428e15cc41e3603942edd4a1aa991127ce9eccea.tar.xz linux-428e15cc41e3603942edd4a1aa991127ce9eccea.zip |
drm/rockchip: vop: add rk3188 vop definitions
The rk3188 has 2 vops not using iommus which only output directly
to a rgb interface per vop. So all other output modes like hdmi
are provided by external brige chips.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Sandy Huang <hjc@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20180830110937.1739-1-heiko@sntech.de
Diffstat (limited to 'drivers/gpu/drm/rockchip/rockchip_vop_reg.h')
-rw-r--r-- | drivers/gpu/drm/rockchip/rockchip_vop_reg.h | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h index 71527cb73295..7348c68352ed 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h @@ -958,4 +958,29 @@ #define PX30_GAMMA_LUT_ADDR 0x00a00 /* px30 register definition end */ +/* rk3188 register definition */ +#define RK3188_SYS_CTRL 0x00 +#define RK3188_DSP_CTRL0 0x04 +#define RK3188_DSP_CTRL1 0x08 +#define RK3188_INT_STATUS 0x10 +#define RK3188_WIN0_YRGB_MST0 0x20 +#define RK3188_WIN0_CBR_MST0 0x24 +#define RK3188_WIN0_YRGB_MST1 0x28 +#define RK3188_WIN0_CBR_MST1 0x2c +#define RK3188_WIN_VIR 0x30 +#define RK3188_WIN0_ACT_INFO 0x34 +#define RK3188_WIN0_DSP_INFO 0x38 +#define RK3188_WIN0_DSP_ST 0x3c +#define RK3188_WIN0_SCL_FACTOR_YRGB 0x40 +#define RK3188_WIN0_SCL_FACTOR_CBR 0x44 +#define RK3188_WIN1_MST 0x4c +#define RK3188_WIN1_DSP_INFO 0x50 +#define RK3188_WIN1_DSP_ST 0x54 +#define RK3188_DSP_HTOTAL_HS_END 0x6c +#define RK3188_DSP_HACT_ST_END 0x70 +#define RK3188_DSP_VTOTAL_VS_END 0x74 +#define RK3188_DSP_VACT_ST_END 0x78 +#define RK3188_REG_CFG_DONE 0x90 +/* rk3188 register definition end */ + #endif /* _ROCKCHIP_VOP_REG_H */ |