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author | Thierry Reding <treding@nvidia.com> | 2018-09-21 12:27:44 +0200 |
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committer | Thierry Reding <treding@nvidia.com> | 2018-09-26 16:04:39 +0200 |
commit | 474431968507d437d340de35b709aa3b41f8c996 (patch) | |
tree | 049e9da21ef5d009aa086f0c09a73bd5509fcebd /drivers/gpu/drm/tegra/dc.h | |
parent | drm/tegra: hub: Add Tegra194 support (diff) | |
download | linux-474431968507d437d340de35b709aa3b41f8c996.tar.xz linux-474431968507d437d340de35b709aa3b41f8c996.zip |
drm/tegra: dc: Add Tegra194 support
The display controllers found on Tegra194 are almost identical to those
found on Tegra186.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra/dc.h')
-rw-r--r-- | drivers/gpu/drm/tegra/dc.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/tegra/dc.h b/drivers/gpu/drm/tegra/dc.h index e96f582ca692..1256dfb6b2f5 100644 --- a/drivers/gpu/drm/tegra/dc.h +++ b/drivers/gpu/drm/tegra/dc.h @@ -300,7 +300,7 @@ int tegra_dc_rgb_exit(struct tegra_dc *dc); #define SOR1_TIMING_CYA (1 << 27) #define CURSOR_ENABLE (1 << 16) -#define SOR_ENABLE(x) (1 << (25 + (x))) +#define SOR_ENABLE(x) (1 << (25 + (((x) > 1) ? ((x) + 1) : (x)))) #define DC_DISP_DISP_MEM_HIGH_PRIORITY 0x403 #define CURSOR_THRESHOLD(x) (((x) & 0x03) << 24) |