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authorMikko Perttunen <mperttunen@nvidia.com>2024-04-24 07:13:35 +0200
committerThierry Reding <treding@nvidia.com>2024-08-29 20:14:29 +0200
commitf5b8794e17e40219f22cf9b1216db21e38aa8dbb (patch)
tree571634c9318a25695027b398905328eeab273e18 /drivers/gpu/drm/tegra/gem.h
parentdrm/tegra: gem: Open code drm_prime_gem_destroy (diff)
downloadlinux-f5b8794e17e40219f22cf9b1216db21e38aa8dbb.tar.xz
linux-f5b8794e17e40219f22cf9b1216db21e38aa8dbb.zip
drm/tegra: gem: Don't attach dma-bufs when not needed
The dma-buf import code currently attaches and maps all imported dma-bufs to the drm device to get their sgt for mapping to the directly managed IOMMU domain. In many cases, like for newer chips (Tegra186+), the directly managed IOMMU domain is, however, not used. Mapping to the drm device can also cause issues e.g. with swiotlb since it is not a real device. To improve the situation, only attach and map imported dma-bufs when required. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240424051335.2872574-2-cyndis@kapsi.fi
Diffstat (limited to 'drivers/gpu/drm/tegra/gem.h')
-rw-r--r--drivers/gpu/drm/tegra/gem.h21
1 files changed, 21 insertions, 0 deletions
diff --git a/drivers/gpu/drm/tegra/gem.h b/drivers/gpu/drm/tegra/gem.h
index cb5146a67668..bf2cbd48eb3f 100644
--- a/drivers/gpu/drm/tegra/gem.h
+++ b/drivers/gpu/drm/tegra/gem.h
@@ -32,6 +32,26 @@ struct tegra_bo_tiling {
enum tegra_bo_sector_layout sector_layout;
};
+/*
+ * How memory is referenced within a tegra_bo:
+ *
+ * Buffer source | Mapping API(*) | Fields
+ * ---------------+-----------------+---------------
+ * Allocated here | DMA API | iova (IOVA mapped to drm->dev), vaddr (CPU VA)
+ *
+ * Allocated here | IOMMU API | pages/num_pages (Phys. memory), sgt (Mapped to drm->dev),
+ * | iova/size (Mapped to domain)
+ *
+ * Imported | DMA API | dma_buf (Imported dma_buf)
+ *
+ * Imported | IOMMU API | dma_buf (Imported dma_buf),
+ * | gem->import_attach (Attachment on drm->dev),
+ * | sgt (Mapped to drm->dev)
+ * | iova/size (Mapped to domain)
+ *
+ * (*) If tegra->domain is set, i.e. TegraDRM IOMMU domain is directly managed through IOMMU API,
+ * this is IOMMU API. Otherwise DMA API.
+ */
struct tegra_bo {
struct drm_gem_object gem;
struct host1x_bo base;
@@ -39,6 +59,7 @@ struct tegra_bo {
struct sg_table *sgt;
dma_addr_t iova;
void *vaddr;
+ struct dma_buf *dma_buf;
struct drm_mm_node *mm;
unsigned long num_pages;