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authorShiwu Zhang <shiwu.zhang@amd.com>2023-05-17 07:40:04 +0200
committerAlex Deucher <alexander.deucher@amd.com>2023-06-09 17:02:17 +0200
commit491ae27829cda38df3ab6d2fe5d94a80ec1bbe22 (patch)
tree18f87b12035985eafc30078207bf209d6330ce67 /drivers/gpu/drm
parentdrm/amdgpu: golden settings for ASIC rev_id 0 (diff)
downloadlinux-491ae27829cda38df3ab6d2fe5d94a80ec1bbe22.tar.xz
linux-491ae27829cda38df3ab6d2fe5d94a80ec1bbe22.zip
drm/amdgpu: complement the 4, 6 and 8 XCC cases
Signed-off-by: Shiwu Zhang <shiwu.zhang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
index 35d359de0aad..ebdd7fa985d6 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
@@ -1040,6 +1040,9 @@ static void gfx_v9_4_3_xcc_program_xcc_id(struct amdgpu_device *adev,
WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HYP_XCP_CTL, 0x8);
break;
case 2:
+ case 4:
+ case 6:
+ case 8:
tmp = (xcc_id % adev->gfx.num_xcc_per_xcp) << REG_FIELD_SHIFT(CP_HYP_XCP_CTL, VIRTUAL_XCC_ID);
tmp = tmp | (adev->gfx.num_xcc_per_xcp << REG_FIELD_SHIFT(CP_HYP_XCP_CTL, NUM_XCC_IN_XCP));
WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HYP_XCP_CTL, tmp);