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authorIlia Mirkin <imirkin@alum.mit.edu>2017-10-01 19:52:43 +0200
committerBen Skeggs <bskeggs@redhat.com>2017-10-03 08:34:17 +0200
commit194d68dd051c2dd5ac2b522ae16100e774e8d869 (patch)
tree5ceee9cef79e34e229cf8cd254183a2a5f2c2307 /drivers/gpu
parentdrm/nouveau/mmu: flush tlbs before deleting page tables (diff)
downloadlinux-194d68dd051c2dd5ac2b522ae16100e774e8d869.tar.xz
linux-194d68dd051c2dd5ac2b522ae16100e774e8d869.zip
drm/nouveau/bsp/g92: disable by default
G92's seem to require some additional bit of initialization before the BSP engine can work. It feels like clocks are not set up for the underlying VLD engine, which means that all commands submitted to the xtensa chip end up hanging. VP seems to work fine though. This still allows people to force-enable the bsp engine if they want to play around with it, but makes it harder for the card to hang by default. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/bsp/g84.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/bsp/g84.c b/drivers/gpu/drm/nouveau/nvkm/engine/bsp/g84.c
index 8e2e24a74774..44e116f7880d 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/bsp/g84.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/bsp/g84.c
@@ -39,5 +39,5 @@ int
g84_bsp_new(struct nvkm_device *device, int index, struct nvkm_engine **pengine)
{
return nvkm_xtensa_new_(&g84_bsp, device, index,
- true, 0x103000, pengine);
+ device->chipset != 0x92, 0x103000, pengine);
}