diff options
| author | Likun Gao <Likun.Gao@amd.com> | 2019-09-16 05:37:42 +0200 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2020-04-13 18:02:15 +0200 |
| commit | e8663832b088fb37ad6558f62dcaf3ae0116bb8d (patch) | |
| tree | c531a8c38af320e9e5fe9ff3fadfabea52a8c944 /drivers/gpu | |
| parent | drm/amdgpu: fix wrong vram lost counter increment V2 (diff) | |
| download | linux-e8663832b088fb37ad6558f62dcaf3ae0116bb8d.tar.xz linux-e8663832b088fb37ad6558f62dcaf3ae0116bb8d.zip | |
drm/amdgpu/powerplay: get SMC FW size to a flexible way
Get SMC fw size before backdoor loading instead of giving an
certain value, as it may different for different ASIC.
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 4 |
2 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h index 674e426ed59b..10ad10b906bb 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h +++ b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h @@ -37,7 +37,6 @@ #define MP0_SRAM 0x03900000 #define MP1_Public 0x03b00000 #define MP1_SRAM 0x03c00004 -#define MP1_SMC_SIZE 0x40000 /* address block */ #define smnMP1_FIRMWARE_FLAGS 0x3010024 diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c index 655ba4fb05dc..205611b9d552 100644 --- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c +++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c @@ -201,13 +201,15 @@ int smu_v11_0_load_microcode(struct smu_context *smu) const struct smc_firmware_header_v1_0 *hdr; uint32_t addr_start = MP1_SRAM; uint32_t i; + uint32_t smc_fw_size; uint32_t mp1_fw_flags; hdr = (const struct smc_firmware_header_v1_0 *) adev->pm.fw->data; src = (const uint32_t *)(adev->pm.fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); + smc_fw_size = hdr->header.ucode_size_bytes; - for (i = 1; i < MP1_SMC_SIZE/4 - 1; i++) { + for (i = 1; i < smc_fw_size/4 - 1; i++) { WREG32_PCIE(addr_start, src[i]); addr_start += 4; } |