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| author | Shyam Sundar S K <Shyam-sundar.S-k@amd.com> | 2023-01-24 12:11:27 +0100 |
|---|---|---|
| committer | Wolfram Sang <wsa@kernel.org> | 2023-01-28 20:05:32 +0100 |
| commit | 60a1f9f28660657f863a3846a64b6c3cbb18f07d (patch) | |
| tree | 3855d2cafaa5bb6a39501f906b765254428906e6 /drivers/i2c/busses/i2c-designware-core.h | |
| parent | i2c: gpio: support write-only sda/scl w/o pull-up (diff) | |
| download | linux-60a1f9f28660657f863a3846a64b6c3cbb18f07d.tar.xz linux-60a1f9f28660657f863a3846a64b6c3cbb18f07d.zip | |
i2c: designware: add a new bit check for IC_CON control
On some AMD platforms, based on the new designware datasheet,
BIOS sets the BIT(11) within the IC_CON register to advertise
the "bus clear feature capability".
AMD/Designware datasheet says:
Bit(11) BUS_CLEAR_FEATURE_CTRL. Read-write,Volatile. Reset: 0.
Description: In Master mode:
- 1'b1: Bus Clear Feature is enabled.
- 1'b0: Bus Clear Feature is Disabled.
In Slave mode, this register bit is not applicable.
On AMD platform designs:
1. BIOS programs the BUS_CLEAR_FEATURE_CTRL and enables the detection
of SCL/SDA stuck low.
2. Whenever the stuck low is detected, the SMU FW shall do the bus
recovery procedure.
Currently, the way in which the "master_cfg" is built in the driver, it
overrides the BUS_CLEAR_FEATURE_CTRL advertised by BIOS and the SMU FW
cannot initiate the bus recovery if the stuck low is detected.
Hence add a check in i2c_dw_probe_master() that if the BIOS
advertises the bus clear feature, let driver not ignore it and
adapt accordingly.
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
Diffstat (limited to 'drivers/i2c/busses/i2c-designware-core.h')
| -rw-r--r-- | drivers/i2c/busses/i2c-designware-core.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h index 6bc2edec14f2..932395ddd42b 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -37,6 +37,7 @@ #define DW_IC_CON_STOP_DET_IFADDRESSED BIT(7) #define DW_IC_CON_TX_EMPTY_CTRL BIT(8) #define DW_IC_CON_RX_FIFO_FULL_HLD_CTRL BIT(9) +#define DW_IC_CON_BUS_CLEAR_CTRL BIT(11) #define DW_IC_DATA_CMD_DAT GENMASK(7, 0) |